/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* Copyright (C) 2021 Martin Blumenstingl <[email protected]> * Copyright (C) 2021 Jernej Skrabec <[email protected]> */ #ifndef __REG_SDIO_H_ #define __REG_SDIO_H_ /* I/O bus domain address mapping */ #define SDIO_LOCAL_OFFSET … #define WLAN_IOREG_OFFSET … #define FIRMWARE_FIFO_OFFSET … #define TX_HIQ_OFFSET … #define TX_MIQ_OFFSET … #define TX_LOQ_OFFSET … #define TX_EPQ_OFFSET … #define RX_RX0FF_OFFSET … #define RTW_SDIO_BUS_MSK … #define SDIO_LOCAL_REG_MSK … #define WLAN_IOREG_REG_MSK … /* SDIO Tx Control */ #define REG_SDIO_TX_CTRL … /*SDIO status timeout*/ #define REG_SDIO_TIMEOUT … /* SDIO Host Interrupt Mask */ #define REG_SDIO_HIMR … #define REG_SDIO_HIMR_RX_REQUEST … #define REG_SDIO_HIMR_AVAL … #define REG_SDIO_HIMR_TXERR … #define REG_SDIO_HIMR_RXERR … #define REG_SDIO_HIMR_TXFOVW … #define REG_SDIO_HIMR_RXFOVW … #define REG_SDIO_HIMR_TXBCNOK … #define REG_SDIO_HIMR_TXBCNERR … #define REG_SDIO_HIMR_BCNERLY_INT … #define REG_SDIO_HIMR_C2HCMD … #define REG_SDIO_HIMR_CPWM1 … #define REG_SDIO_HIMR_CPWM2 … #define REG_SDIO_HIMR_HSISR_IND … #define REG_SDIO_HIMR_GTINT3_IND … #define REG_SDIO_HIMR_GTINT4_IND … #define REG_SDIO_HIMR_PSTIMEOUT … #define REG_SDIO_HIMR_OCPINT … #define REG_SDIO_HIMR_ATIMEND … #define REG_SDIO_HIMR_ATIMEND_E … #define REG_SDIO_HIMR_CTWEND … /* the following two are RTL8188 SDIO Specific */ #define REG_SDIO_HIMR_MCU_ERR … #define REG_SDIO_HIMR_TSF_BIT32_TOGGLE … /* SDIO Host Interrupt Service Routine */ #define REG_SDIO_HISR … #define REG_SDIO_HISR_RX_REQUEST … #define REG_SDIO_HISR_AVAL … #define REG_SDIO_HISR_TXERR … #define REG_SDIO_HISR_RXERR … #define REG_SDIO_HISR_TXFOVW … #define REG_SDIO_HISR_RXFOVW … #define REG_SDIO_HISR_TXBCNOK … #define REG_SDIO_HISR_TXBCNERR … #define REG_SDIO_HISR_BCNERLY_INT … #define REG_SDIO_HISR_C2HCMD … #define REG_SDIO_HISR_CPWM1 … #define REG_SDIO_HISR_CPWM2 … #define REG_SDIO_HISR_HSISR_IND … #define REG_SDIO_HISR_GTINT3_IND … #define REG_SDIO_HISR_GTINT4_IND … #define REG_SDIO_HISR_PSTIMEOUT … #define REG_SDIO_HISR_OCPINT … #define REG_SDIO_HISR_ATIMEND … #define REG_SDIO_HISR_ATIMEND_E … #define REG_SDIO_HISR_CTWEND … /* the following two are RTL8188 SDIO Specific */ #define REG_SDIO_HISR_MCU_ERR … #define REG_SDIO_HISR_TSF_BIT32_TOGGLE … /* HCI Current Power Mode */ #define REG_SDIO_HCPWM … /* RXDMA Request Length */ #define REG_SDIO_RX0_REQ_LEN … /* OQT Free Page */ #define REG_SDIO_OQT_FREE_PG … /* Free Tx Buffer Page */ #define REG_SDIO_FREE_TXPG … /* HCI Current Power Mode 1 */ #define REG_SDIO_HCPWM1 … /* HCI Current Power Mode 2 */ #define REG_SDIO_HCPWM2 … /* Free Tx Page Sequence */ #define REG_SDIO_FREE_TXPG_SEQ … /* HTSF Information */ #define REG_SDIO_HTSFR_INFO … #define REG_SDIO_HCPWM1_V2 … /* H2C */ #define REG_SDIO_H2C … /* HCI Request Power Mode 1 */ #define REG_SDIO_HRPWM1 … /* HCI Request Power Mode 2 */ #define REG_SDIO_HRPWM2 … /* HCI Power Save Clock */ #define REG_SDIO_HPS_CLKR … /* SDIO HCI Suspend Control */ #define REG_SDIO_HSUS_CTRL … #define BIT_HCI_SUS_REQ … #define BIT_HCI_RESUME_RDY … /* SDIO Host Extension Interrupt Mask Always */ #define REG_SDIO_HIMR_ON … /* SDIO Host Extension Interrupt Status Always */ #define REG_SDIO_HISR_ON … #define REG_SDIO_INDIRECT_REG_CFG … #define BIT_SDIO_INDIRECT_REG_CFG_WORD … #define BIT_SDIO_INDIRECT_REG_CFG_DWORD … #define BIT_SDIO_INDIRECT_REG_CFG_WRITE … #define BIT_SDIO_INDIRECT_REG_CFG_READ … #define BIT_SDIO_INDIRECT_REG_CFG_UNK20 … #define REG_SDIO_INDIRECT_REG_DATA … /* Sdio Address for SDIO Local Reg, TRX FIFO, MAC Reg */ #define REG_SDIO_CMD_ADDR_MSK … #define REG_SDIO_CMD_ADDR_SDIO_REG … #define REG_SDIO_CMD_ADDR_MAC_REG … #define REG_SDIO_CMD_ADDR_TXFF_HIGH … #define REG_SDIO_CMD_ADDR_TXFF_LOW … #define REG_SDIO_CMD_ADDR_TXFF_NORMAL … #define REG_SDIO_CMD_ADDR_TXFF_EXTRA … #define REG_SDIO_CMD_ADDR_RXFF … #define RTW_SDIO_BLOCK_SIZE … #define RTW_SDIO_ADDR_RX_RX0FF_GEN(_id) … #define RTW_SDIO_DATA_PTR_ALIGN … struct sdio_func; struct sdio_device_id; struct rtw_sdio_tx_data { … }; struct rtw_sdio_work_data { … }; struct rtw_sdio { … }; extern const struct dev_pm_ops rtw_sdio_pm_ops; int rtw_sdio_probe(struct sdio_func *sdio_func, const struct sdio_device_id *id); void rtw_sdio_remove(struct sdio_func *sdio_func); void rtw_sdio_shutdown(struct device *dev); static inline bool rtw_sdio_is_sdio30_supported(struct rtw_dev *rtwdev) { … } #endif
Codebase Browser
linux