linux/drivers/net/wireless/realtek/rtw88/phy.c

// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/* Copyright(c) 2018-2019  Realtek Corporation
 */

#include <linux/bcd.h>

#include "main.h"
#include "reg.h"
#include "fw.h"
#include "phy.h"
#include "debug.h"
#include "regd.h"
#include "sar.h"

struct phy_cfg_pair {};

phy_table_tile;

static const u32 db_invert_table[12][8] =;

u8 rtw_cck_rates[] =;
u8 rtw_ofdm_rates[] =;
u8 rtw_ht_1s_rates[] =;
u8 rtw_ht_2s_rates[] =;
u8 rtw_vht_1s_rates[] =;
u8 rtw_vht_2s_rates[] =;
u8 *rtw_rate_section[RTW_RATE_SECTION_MAX] =;
EXPORT_SYMBOL();

u8 rtw_rate_size[RTW_RATE_SECTION_MAX] =;
EXPORT_SYMBOL();

static const u8 rtw_cck_size =;
static const u8 rtw_ofdm_size =;
static const u8 rtw_ht_1s_size =;
static const u8 rtw_ht_2s_size =;
static const u8 rtw_vht_1s_size =;
static const u8 rtw_vht_2s_size =;

enum rtw_phy_band_type {};

static void rtw_phy_cck_pd_init(struct rtw_dev *rtwdev)
{}

void rtw_phy_set_edcca_th(struct rtw_dev *rtwdev, u8 l2h, u8 h2l)
{}
EXPORT_SYMBOL();

void rtw_phy_adaptivity_set_mode(struct rtw_dev *rtwdev)
{}

static void rtw_phy_adaptivity_init(struct rtw_dev *rtwdev)
{}

static void rtw_phy_adaptivity(struct rtw_dev *rtwdev)
{}

static void rtw_phy_cfo_init(struct rtw_dev *rtwdev)
{}

static void rtw_phy_tx_path_div_init(struct rtw_dev *rtwdev)
{}

void rtw_phy_init(struct rtw_dev *rtwdev)
{}
EXPORT_SYMBOL();

void rtw_phy_dig_write(struct rtw_dev *rtwdev, u8 igi)
{}

static void rtw_phy_stat_false_alarm(struct rtw_dev *rtwdev)
{}

#define RA_FLOOR_TABLE_SIZE
#define RA_FLOOR_UP_GAP

static u8 rtw_phy_get_rssi_level(u8 old_level, u8 rssi)
{}

struct rtw_phy_stat_iter_data {};

static void rtw_phy_stat_rssi_iter(void *data, struct ieee80211_sta *sta)
{}

static void rtw_phy_stat_rssi(struct rtw_dev *rtwdev)
{}

static void rtw_phy_stat_rate_cnt(struct rtw_dev *rtwdev)
{}

static void rtw_phy_statistics(struct rtw_dev *rtwdev)
{}

#define DIG_PERF_FA_TH_LOW
#define DIG_PERF_FA_TH_HIGH
#define DIG_PERF_FA_TH_EXTRA_HIGH
#define DIG_PERF_MAX
#define DIG_PERF_MID
#define DIG_CVRG_FA_TH_LOW
#define DIG_CVRG_FA_TH_HIGH
#define DIG_CVRG_FA_TH_EXTRA_HIGH
#define DIG_CVRG_MAX
#define DIG_CVRG_MID
#define DIG_CVRG_MIN
#define DIG_RSSI_GAIN_OFFSET

static bool
rtw_phy_dig_check_damping(struct rtw_dm_info *dm_info)
{}

static void rtw_phy_dig_get_boundary(struct rtw_dev *rtwdev,
				     struct rtw_dm_info *dm_info,
				     u8 *upper, u8 *lower, bool linked)
{}

static void rtw_phy_dig_get_threshold(struct rtw_dm_info *dm_info,
				      u16 *fa_th, u8 *step, bool linked)
{}

static void rtw_phy_dig_recorder(struct rtw_dm_info *dm_info, u8 igi, u16 fa)
{}

static void rtw_phy_dig(struct rtw_dev *rtwdev)
{}

static void rtw_phy_ra_info_update_iter(void *data, struct ieee80211_sta *sta)
{}

static void rtw_phy_ra_info_update(struct rtw_dev *rtwdev)
{}

static u32 rtw_phy_get_rrsr_mask(struct rtw_dev *rtwdev, u8 rate_idx)
{}

static void rtw_phy_rrsr_mask_min_iter(void *data, struct ieee80211_sta *sta)
{}

static void rtw_phy_rrsr_update(struct rtw_dev *rtwdev)
{}

static void rtw_phy_dpk_track(struct rtw_dev *rtwdev)
{}

struct rtw_rx_addr_match_data {};

static void rtw_phy_parsing_cfo_iter(void *data, u8 *mac,
				     struct ieee80211_vif *vif)
{}

void rtw_phy_parsing_cfo(struct rtw_dev *rtwdev,
			 struct rtw_rx_pkt_stat *pkt_stat)
{}
EXPORT_SYMBOL();

static void rtw_phy_cfo_track(struct rtw_dev *rtwdev)
{}

#define CCK_PD_FA_LV1_MIN
#define CCK_PD_FA_LV0_MAX

static u8 rtw_phy_cck_pd_lv_unlink(struct rtw_dev *rtwdev)
{}

#define CCK_PD_IGI_LV4_VAL
#define CCK_PD_IGI_LV3_VAL
#define CCK_PD_IGI_LV2_VAL
#define CCK_PD_RSSI_LV4_VAL
#define CCK_PD_RSSI_LV3_VAL
#define CCK_PD_RSSI_LV2_VAL

static u8 rtw_phy_cck_pd_lv_link(struct rtw_dev *rtwdev)
{}

static u8 rtw_phy_cck_pd_lv(struct rtw_dev *rtwdev)
{}

static void rtw_phy_cck_pd(struct rtw_dev *rtwdev)
{}

static void rtw_phy_pwr_track(struct rtw_dev *rtwdev)
{}

static void rtw_phy_ra_track(struct rtw_dev *rtwdev)
{}

void rtw_phy_dynamic_mechanism(struct rtw_dev *rtwdev)
{}

#define FRAC_BITS

static u8 rtw_phy_power_2_db(s8 power)
{}

static u64 rtw_phy_db_2_linear(u8 power_db)
{}

static u8 rtw_phy_linear_2_db(u64 linear)
{}

u8 rtw_phy_rf_power_2_rssi(s8 *rf_power, u8 path_num)
{}
EXPORT_SYMBOL();

u32 rtw_phy_read_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
		    u32 addr, u32 mask)
{}
EXPORT_SYMBOL();

u32 rtw_phy_read_rf_sipi(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
			 u32 addr, u32 mask)
{}
EXPORT_SYMBOL();

bool rtw_phy_write_rf_reg_sipi(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
			       u32 addr, u32 mask, u32 data)
{}
EXPORT_SYMBOL();

bool rtw_phy_write_rf_reg(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
			  u32 addr, u32 mask, u32 data)
{}

bool rtw_phy_write_rf_reg_mix(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path,
			      u32 addr, u32 mask, u32 data)
{}
EXPORT_SYMBOL();

void rtw_phy_setup_phy_cond(struct rtw_dev *rtwdev, u32 pkg)
{}

static bool check_positive(struct rtw_dev *rtwdev, struct rtw_phy_cond cond)
{}

void rtw_parse_tbl_phy_cond(struct rtw_dev *rtwdev, const struct rtw_table *tbl)
{}
EXPORT_SYMBOL();

#define bcd_to_dec_pwr_by_rate(val, i)

static u8 tbl_to_dec_pwr_by_rate(struct rtw_dev *rtwdev, u32 hex, u8 i)
{}

static void
rtw_phy_get_rate_values_of_txpwr_by_rate(struct rtw_dev *rtwdev,
					 u32 addr, u32 mask, u32 val, u8 *rate,
					 u8 *pwr_by_rate, u8 *rate_num)
{}

static void rtw_phy_store_tx_power_by_rate(struct rtw_dev *rtwdev,
					   u32 band, u32 rfpath, u32 txnum,
					   u32 regaddr, u32 bitmask, u32 data)
{}

void rtw_parse_tbl_bb_pg(struct rtw_dev *rtwdev, const struct rtw_table *tbl)
{}
EXPORT_SYMBOL();

static const u8 rtw_channel_idx_5g[RTW_MAX_CHANNEL_NUM_5G] =; /* Band 4 */

static int rtw_channel_to_idx(u8 band, u8 channel)
{}

static void rtw_phy_set_tx_power_limit(struct rtw_dev *rtwdev, u8 regd, u8 band,
				       u8 bw, u8 rs, u8 ch, s8 pwr_limit)
{}

/* cross-reference 5G power limits if values are not assigned */
static void
rtw_xref_5g_txpwr_lmt(struct rtw_dev *rtwdev, u8 regd,
		      u8 bw, u8 ch_idx, u8 rs_ht, u8 rs_vht)
{}

/* cross-reference power limits for ht and vht */
static void
rtw_xref_txpwr_lmt_by_rs(struct rtw_dev *rtwdev, u8 regd, u8 bw, u8 ch_idx)
{}

/* cross-reference power limits for 5G channels */
static void
rtw_xref_5g_txpwr_lmt_by_ch(struct rtw_dev *rtwdev, u8 regd, u8 bw)
{}

/* cross-reference power limits for 20/40M bandwidth */
static void
rtw_xref_txpwr_lmt_by_bw(struct rtw_dev *rtwdev, u8 regd)
{}

/* cross-reference power limits */
static void rtw_xref_txpwr_lmt(struct rtw_dev *rtwdev)
{}

static void
__cfg_txpwr_lmt_by_alt(struct rtw_hal *hal, u8 regd, u8 regd_alt, u8 bw, u8 rs)
{}

static void
rtw_cfg_txpwr_lmt_by_alt(struct rtw_dev *rtwdev, u8 regd, u8 regd_alt)
{}

void rtw_parse_tbl_txpwr_lmt(struct rtw_dev *rtwdev,
			     const struct rtw_table *tbl)
{}
EXPORT_SYMBOL();

void rtw_phy_cfg_mac(struct rtw_dev *rtwdev, const struct rtw_table *tbl,
		     u32 addr, u32 data)
{}
EXPORT_SYMBOL();

void rtw_phy_cfg_agc(struct rtw_dev *rtwdev, const struct rtw_table *tbl,
		     u32 addr, u32 data)
{}
EXPORT_SYMBOL();

void rtw_phy_cfg_bb(struct rtw_dev *rtwdev, const struct rtw_table *tbl,
		    u32 addr, u32 data)
{}
EXPORT_SYMBOL();

void rtw_phy_cfg_rf(struct rtw_dev *rtwdev, const struct rtw_table *tbl,
		    u32 addr, u32 data)
{}
EXPORT_SYMBOL();

static void rtw_load_rfk_table(struct rtw_dev *rtwdev)
{}

void rtw_phy_load_tables(struct rtw_dev *rtwdev)
{}
EXPORT_SYMBOL();

static u8 rtw_get_channel_group(u8 channel, u8 rate)
{}

static s8 rtw_phy_get_dis_dpd_by_rate_diff(struct rtw_dev *rtwdev, u16 rate)
{}

static u8 rtw_phy_get_2g_tx_power_index(struct rtw_dev *rtwdev,
					struct rtw_2g_txpwr_idx *pwr_idx_2g,
					enum rtw_bandwidth bandwidth,
					u8 rate, u8 group)
{}

static u8 rtw_phy_get_5g_tx_power_index(struct rtw_dev *rtwdev,
					struct rtw_5g_txpwr_idx *pwr_idx_5g,
					enum rtw_bandwidth bandwidth,
					u8 rate, u8 group)
{}

/* return RTW_RATE_SECTION_MAX to indicate rate is invalid */
static u8 rtw_phy_rate_to_rate_section(u8 rate)
{}

static s8 rtw_phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band,
				     enum rtw_bandwidth bw, u8 rf_path,
				     u8 rate, u8 channel, u8 regd)
{}

static s8 rtw_phy_get_tx_power_sar(struct rtw_dev *rtwdev, u8 sar_band,
				   u8 rf_path, u8 rate)
{}

void rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw,
			     u8 ch, u8 regd, struct rtw_power_params *pwr_param)
{}

u8
rtw_phy_get_tx_power_index(struct rtw_dev *rtwdev, u8 rf_path, u8 rate,
			   enum rtw_bandwidth bandwidth, u8 channel, u8 regd)
{}
EXPORT_SYMBOL();

static void rtw_phy_set_tx_power_index_by_rs(struct rtw_dev *rtwdev,
					     u8 ch, u8 path, u8 rs)
{}

/* set tx power level by path for each rates, note that the order of the rates
 * are *very* important, bacause 8822B/8821C combines every four bytes of tx
 * power index into a four-byte power index register, and calls set_tx_agc to
 * write these values into hardware
 */
static void rtw_phy_set_tx_power_level_by_path(struct rtw_dev *rtwdev,
					       u8 ch, u8 path)
{}

void rtw_phy_set_tx_power_level(struct rtw_dev *rtwdev, u8 channel)
{}
EXPORT_SYMBOL();

static void
rtw_phy_tx_power_by_rate_config_by_path(struct rtw_hal *hal, u8 path,
					u8 rs, u8 size, u8 *rates)
{}

void rtw_phy_tx_power_by_rate_config(struct rtw_hal *hal)
{}

static void
__rtw_phy_tx_power_limit_config(struct rtw_hal *hal, u8 regd, u8 bw, u8 rs)
{}

void rtw_phy_tx_power_limit_config(struct rtw_hal *hal)
{}

static void rtw_phy_init_tx_power_limit(struct rtw_dev *rtwdev,
					u8 regd, u8 bw, u8 rs)
{}

void rtw_phy_init_tx_power(struct rtw_dev *rtwdev)
{}

void rtw_phy_config_swing_table(struct rtw_dev *rtwdev,
				struct rtw_swing_table *swing_table)
{}
EXPORT_SYMBOL();

void rtw_phy_pwrtrack_avg(struct rtw_dev *rtwdev, u8 thermal, u8 path)
{}
EXPORT_SYMBOL();

bool rtw_phy_pwrtrack_thermal_changed(struct rtw_dev *rtwdev, u8 thermal,
				      u8 path)
{}
EXPORT_SYMBOL();

u8 rtw_phy_pwrtrack_get_delta(struct rtw_dev *rtwdev, u8 path)
{}
EXPORT_SYMBOL();

s8 rtw_phy_pwrtrack_get_pwridx(struct rtw_dev *rtwdev,
			       struct rtw_swing_table *swing_table,
			       u8 tbl_path, u8 therm_path, u8 delta)
{}
EXPORT_SYMBOL();

bool rtw_phy_pwrtrack_need_lck(struct rtw_dev *rtwdev)
{}
EXPORT_SYMBOL();

bool rtw_phy_pwrtrack_need_iqk(struct rtw_dev *rtwdev)
{}
EXPORT_SYMBOL();

static void rtw_phy_set_tx_path_by_reg(struct rtw_dev *rtwdev,
				       enum rtw_bb_path tx_path_sel_1ss)
{}

static void rtw_phy_tx_path_div_select(struct rtw_dev *rtwdev)
{}

static void rtw_phy_tx_path_diversity_2ss(struct rtw_dev *rtwdev)
{}

void rtw_phy_tx_path_diversity(struct rtw_dev *rtwdev)
{}