/* * @section LICENSE * Copyright (c) 2014 Redpine Signals Inc. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ #ifndef __RSI_SDIO_INTF__ #define __RSI_SDIO_INTF__ #include <linux/mmc/card.h> #include <linux/mmc/mmc.h> #include <linux/mmc/host.h> #include <linux/mmc/sdio_func.h> #include <linux/mmc/sdio.h> #include <linux/mmc/sd.h> #include <linux/mmc/sdio_ids.h> #include "rsi_main.h" enum sdio_interrupt_type { … }; /* Buffer status register related info */ #define PKT_BUFF_SEMI_FULL … #define PKT_BUFF_FULL … #define PKT_MGMT_BUFF_FULL … #define MSDU_PKT_PENDING … #define RECV_NUM_BLOCKS … /* Interrupt Bit Related Macros */ #define PKT_BUFF_AVAILABLE … #define FW_ASSERT_IND … #define RSI_MASTER_REG_BUF_SIZE … #define RSI_DEVICE_BUFFER_STATUS_REGISTER … #define RSI_FN1_INT_REGISTER … #define RSI_INT_ENABLE_REGISTER … #define RSI_INT_ENABLE_MASK … #define RSI_SD_REQUEST_MASTER … /* FOR SD CARD ONLY */ #define SDIO_RX_NUM_BLOCKS_REG … #define SDIO_FW_STATUS_REG … #define SDIO_NXT_RD_DELAY2 … #define SDIO_MASTER_ACCESS_MSBYTE … #define SDIO_MASTER_ACCESS_LSBYTE … #define SDIO_READ_START_LVL … #define SDIO_READ_FIFO_CTL … #define SDIO_WRITE_FIFO_CTL … #define SDIO_WAKEUP_REG … #define SDIO_FUN1_INTR_CLR_REG … #define SDIO_REG_HIGH_SPEED … #define RSI_GET_SDIO_INTERRUPT_TYPE(_I, TYPE) … /* common registers in SDIO function1 */ #define TA_SOFT_RESET_REG … #define TA_TH0_PC_REG … #define TA_HOLD_THREAD_REG … #define TA_RELEASE_THREAD_REG … #define TA_SOFT_RST_CLR … #define TA_SOFT_RST_SET … #define TA_PC_ZERO … #define TA_HOLD_THREAD_VALUE … #define TA_RELEASE_THREAD_VALUE … #define TA_BASE_ADDR … #define MISC_CFG_BASE_ADDR … struct receive_info { … }; struct rsi_91x_sdiodev { … }; int rsi_init_sdio_slave_regs(struct rsi_hw *adapter); int rsi_sdio_read_register(struct rsi_hw *adapter, u32 addr, u8 *data); int rsi_sdio_host_intf_read_pkt(struct rsi_hw *adapter, u8 *pkt, u32 length); int rsi_sdio_write_register(struct rsi_hw *adapter, u8 function, u32 addr, u8 *data); int rsi_sdio_write_register_multiple(struct rsi_hw *adapter, u32 addr, u8 *data, u16 count); int rsi_sdio_master_access_msword(struct rsi_hw *adapter, u16 ms_word); void rsi_sdio_ack_intr(struct rsi_hw *adapter, u8 int_bit); int rsi_sdio_determine_event_timeout(struct rsi_hw *adapter); int rsi_sdio_check_buffer_status(struct rsi_hw *adapter, u8 q_num); void rsi_sdio_rx_thread(struct rsi_common *common); #endif
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