linux/drivers/net/wwan/iosm/iosm_ipc_mmio.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2020-21 Intel Corporation.
 */

#include <linux/delay.h>
#include <linux/device.h>
#include <linux/io.h>
#include <linux/io-64-nonatomic-lo-hi.h>
#include <linux/slab.h>

#include "iosm_ipc_mmio.h"
#include "iosm_ipc_mux.h"

/* Definition of MMIO offsets
 * note that MMIO_CI offsets are relative to end of chip info structure
 */

/* MMIO chip info size in bytes */
#define MMIO_CHIP_INFO_SIZE

/* CP execution stage */
#define MMIO_OFFSET_EXECUTION_STAGE

/* Boot ROM Chip Info struct */
#define MMIO_OFFSET_CHIP_INFO

#define MMIO_OFFSET_ROM_EXIT_CODE

#define MMIO_OFFSET_PSI_ADDRESS

#define MMIO_OFFSET_PSI_SIZE

#define MMIO_OFFSET_IPC_STATUS

#define MMIO_OFFSET_CONTEXT_INFO

#define MMIO_OFFSET_BASE_ADDR

#define MMIO_OFFSET_END_ADDR

#define MMIO_OFFSET_CP_VERSION

#define MMIO_OFFSET_CP_CAPABILITIES

/* Timeout in 50 msec to wait for the modem boot code to write a valid
 * execution stage into mmio area
 */
#define IPC_MMIO_EXEC_STAGE_TIMEOUT

/* check if exec stage has one of the valid values */
static bool ipc_mmio_is_valid_exec_stage(enum ipc_mem_exec_stage stage)
{}

void ipc_mmio_update_cp_capability(struct iosm_mmio *ipc_mmio)
{}

struct iosm_mmio *ipc_mmio_init(void __iomem *mmio, struct device *dev)
{}

enum ipc_mem_exec_stage ipc_mmio_get_exec_stage(struct iosm_mmio *ipc_mmio)
{}

void ipc_mmio_copy_chip_info(struct iosm_mmio *ipc_mmio, void *dest,
			     size_t size)
{}

enum ipc_mem_device_ipc_state ipc_mmio_get_ipc_state(struct iosm_mmio *ipc_mmio)
{}

enum rom_exit_code ipc_mmio_get_rom_exit_code(struct iosm_mmio *ipc_mmio)
{}

void ipc_mmio_config(struct iosm_mmio *ipc_mmio)
{}

void ipc_mmio_set_psi_addr_and_size(struct iosm_mmio *ipc_mmio, dma_addr_t addr,
				    u32 size)
{}

void ipc_mmio_set_contex_info_addr(struct iosm_mmio *ipc_mmio, phys_addr_t addr)
{}

int ipc_mmio_get_cp_version(struct iosm_mmio *ipc_mmio)
{}