/* SPDX-License-Identifier: GPL-2.0-only * * Copyright (c) 2021, MediaTek Inc. * Copyright (c) 2021-2022, Intel Corporation. * * Authors: * Haijun Liu <[email protected]> * Eliot Lee <[email protected]> * Ricardo Martinez <[email protected]> * * Contributors: * Amir Hanania <[email protected]> * Moises Veleta <[email protected]> * Sreehari Kancharla <[email protected]> */ #ifndef __T7XX_HIF_DPMA_RX_H__ #define __T7XX_HIF_DPMA_RX_H__ #include <linux/bits.h> #include <linux/types.h> #include "t7xx_hif_dpmaif.h" #define NETIF_MASK … #define PKT_TYPE_IP4 … #define PKT_TYPE_IP6 … /* Structure of DL PIT */ struct dpmaif_pit { … }; /* PIT header fields */ #define PD_PIT_DATA_LEN … #define PD_PIT_BUFFER_ID … #define PD_PIT_BUFFER_TYPE … #define PD_PIT_CONT … #define PD_PIT_PACKET_TYPE … /* PIT footer fields */ #define PD_PIT_DLQ_DONE … #define PD_PIT_ULQ_DONE … #define PD_PIT_HEADER_OFFSET … #define PD_PIT_BI_F … #define PD_PIT_IG … #define PD_PIT_RES … #define PD_PIT_H_BID … #define PD_PIT_PIT_SEQ … #define MSG_PIT_DP … #define MSG_PIT_RES … #define MSG_PIT_NETWORK_TYPE … #define MSG_PIT_CHANNEL_ID … #define MSG_PIT_RES2 … #define MSG_PIT_HPC_IDX … #define MSG_PIT_SRC_QID … #define MSG_PIT_ERROR_BIT … #define MSG_PIT_CHECKSUM … #define MSG_PIT_CONT … #define MSG_PIT_PACKET_TYPE … #define MSG_PIT_HP_IDX … #define MSG_PIT_CMD … #define MSG_PIT_RES3 … #define MSG_PIT_FLOW … #define MSG_PIT_COUNT … #define MSG_PIT_HASH … #define MSG_PIT_RES4 … #define MSG_PIT_PRO … #define MSG_PIT_VBID … #define MSG_PIT_RES5 … #define MSG_PIT_DLQ_DONE … #define MSG_PIT_ULQ_DONE … #define MSG_PIT_IP … #define MSG_PIT_RES6 … #define MSG_PIT_MR … #define MSG_PIT_RES7 … #define MSG_PIT_IG … #define MSG_PIT_RES8 … #define MSG_PIT_H_BID … #define MSG_PIT_PIT_SEQ … int t7xx_dpmaif_rxq_init(struct dpmaif_rx_queue *queue); void t7xx_dpmaif_rx_clear(struct dpmaif_ctrl *dpmaif_ctrl); int t7xx_dpmaif_bat_rel_wq_alloc(struct dpmaif_ctrl *dpmaif_ctrl); int t7xx_dpmaif_rx_buf_alloc(struct dpmaif_ctrl *dpmaif_ctrl, const struct dpmaif_bat_request *bat_req, const unsigned int q_num, const unsigned int buf_cnt, const bool initial); int t7xx_dpmaif_rx_frag_alloc(struct dpmaif_ctrl *dpmaif_ctrl, struct dpmaif_bat_request *bat_req, const unsigned int buf_cnt, const bool first_time); void t7xx_dpmaif_rx_stop(struct dpmaif_ctrl *dpmaif_ctrl); void t7xx_dpmaif_irq_rx_done(struct dpmaif_ctrl *dpmaif_ctrl, const unsigned int que_mask); void t7xx_dpmaif_rxq_free(struct dpmaif_rx_queue *queue); void t7xx_dpmaif_bat_wq_rel(struct dpmaif_ctrl *dpmaif_ctrl); int t7xx_dpmaif_bat_alloc(const struct dpmaif_ctrl *dpmaif_ctrl, struct dpmaif_bat_request *bat_req, const enum bat_type buf_type); void t7xx_dpmaif_bat_free(const struct dpmaif_ctrl *dpmaif_ctrl, struct dpmaif_bat_request *bat_req); int t7xx_dpmaif_napi_rx_poll(struct napi_struct *napi, const int budget); #endif /* __T7XX_HIF_DPMA_RX_H__ */
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