linux/drivers/usb/gadget/udc/mv_u3d.h

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
 */

#ifndef __MV_U3D_H
#define __MV_U3D_H

#define MV_U3D_EP_CONTEXT_ALIGNMENT
#define MV_U3D_TRB_ALIGNMENT
#define MV_U3D_DMA_BOUNDARY
#define MV_U3D_EP0_MAX_PKT_SIZE

/* ep0 transfer state */
#define MV_U3D_WAIT_FOR_SETUP
#define MV_U3D_DATA_STATE_XMIT
#define MV_U3D_DATA_STATE_NEED_ZLP
#define MV_U3D_WAIT_FOR_OUT_STATUS
#define MV_U3D_DATA_STATE_RECV
#define MV_U3D_STATUS_STAGE

#define MV_U3D_EP_MAX_LENGTH_TRANSFER

/* USB3 Interrupt Status */
#define MV_U3D_USBINT_SETUP
#define MV_U3D_USBINT_RX_COMPLETE
#define MV_U3D_USBINT_TX_COMPLETE
#define MV_U3D_USBINT_UNDER_RUN
#define MV_U3D_USBINT_RXDESC_ERR
#define MV_U3D_USBINT_TXDESC_ERR
#define MV_U3D_USBINT_RX_TRB_COMPLETE
#define MV_U3D_USBINT_TX_TRB_COMPLETE
#define MV_U3D_USBINT_VBUS_VALID
#define MV_U3D_USBINT_STORAGE_CMD_FULL
#define MV_U3D_USBINT_LINK_CHG

/* USB3 Interrupt Enable */
#define MV_U3D_INTR_ENABLE_SETUP
#define MV_U3D_INTR_ENABLE_RX_COMPLETE
#define MV_U3D_INTR_ENABLE_TX_COMPLETE
#define MV_U3D_INTR_ENABLE_UNDER_RUN
#define MV_U3D_INTR_ENABLE_RXDESC_ERR
#define MV_U3D_INTR_ENABLE_TXDESC_ERR
#define MV_U3D_INTR_ENABLE_RX_TRB_COMPLETE
#define MV_U3D_INTR_ENABLE_TX_TRB_COMPLETE
#define MV_U3D_INTR_ENABLE_RX_BUFFER_ERR
#define MV_U3D_INTR_ENABLE_VBUS_VALID
#define MV_U3D_INTR_ENABLE_STORAGE_CMD_FULL
#define MV_U3D_INTR_ENABLE_LINK_CHG
#define MV_U3D_INTR_ENABLE_PRIME_STATUS

/* USB3 Link Change */
#define MV_U3D_LINK_CHANGE_LINK_UP
#define MV_U3D_LINK_CHANGE_SUSPEND
#define MV_U3D_LINK_CHANGE_RESUME
#define MV_U3D_LINK_CHANGE_WRESET
#define MV_U3D_LINK_CHANGE_HRESET
#define MV_U3D_LINK_CHANGE_VBUS_INVALID
#define MV_U3D_LINK_CHANGE_INACT
#define MV_U3D_LINK_CHANGE_DISABLE_AFTER_U0
#define MV_U3D_LINK_CHANGE_U1
#define MV_U3D_LINK_CHANGE_U2
#define MV_U3D_LINK_CHANGE_U3

/* bridge setting */
#define MV_U3D_BRIDGE_SETTING_VBUS_VALID

/* Command Register Bit Masks */
#define MV_U3D_CMD_RUN_STOP
#define MV_U3D_CMD_CTRL_RESET

/* ep control register */
#define MV_U3D_EPXCR_EP_TYPE_CONTROL
#define MV_U3D_EPXCR_EP_TYPE_ISOC
#define MV_U3D_EPXCR_EP_TYPE_BULK
#define MV_U3D_EPXCR_EP_TYPE_INT
#define MV_U3D_EPXCR_EP_ENABLE_SHIFT
#define MV_U3D_EPXCR_MAX_BURST_SIZE_SHIFT
#define MV_U3D_EPXCR_MAX_PACKET_SIZE_SHIFT
#define MV_U3D_USB_BULK_BURST_OUT
#define MV_U3D_USB_BULK_BURST_IN

#define MV_U3D_EPXCR_EP_FLUSH
#define MV_U3D_EPXCR_EP_HALT
#define MV_U3D_EPXCR_EP_INIT

/* TX/RX Status Register */
#define MV_U3D_XFERSTATUS_COMPLETE_SHIFT
#define MV_U3D_COMPLETE_INVALID
#define MV_U3D_COMPLETE_SUCCESS
#define MV_U3D_COMPLETE_BUFF_ERR
#define MV_U3D_COMPLETE_SHORT_PACKET
#define MV_U3D_COMPLETE_TRB_ERR
#define MV_U3D_XFERSTATUS_TRB_LENGTH_MASK

#define MV_U3D_USB_LINK_BYPASS_VBUS

#define MV_U3D_LTSSM_PHY_INIT_DONE
#define MV_U3D_LTSSM_NEVER_GO_COMPLIANCE

#define MV_U3D_USB3_OP_REGS_OFFSET
#define MV_U3D_USB3_PHY_OFFSET

#define DCS_ENABLE

/* timeout */
#define MV_U3D_RESET_TIMEOUT
#define MV_U3D_FLUSH_TIMEOUT
#define MV_U3D_OWN_TIMEOUT
#define LOOPS_USEC_SHIFT
#define LOOPS_USEC
#define LOOPS(timeout)

/* ep direction */
#define MV_U3D_EP_DIR_IN
#define MV_U3D_EP_DIR_OUT
#define mv_u3d_ep_dir(ep)

/* usb capability registers */
struct mv_u3d_cap_regs {};

/* operation registers */
struct mv_u3d_op_regs {};

/* control endpoint enable registers */
struct epxcr {};

/* transfer status registers */
struct xferstatus {};

/* vendor unique control registers */
struct mv_u3d_vuc_regs {};

/* Endpoint context structure */
struct mv_u3d_ep_context {};

/* TRB control data structure */
struct mv_u3d_trb_ctrl {};

/* TRB data structure
 * For multiple TRB, all the TRBs' physical address should be continuous.
 */
struct mv_u3d_trb_hw {};

/* TRB structure */
struct mv_u3d_trb {};

/* device data structure */
struct mv_u3d {};

/* endpoint data structure */
struct mv_u3d_ep {};

/* request data structure */
struct mv_u3d_req {};

#endif