// SPDX-License-Identifier: GPL-2.0-or-later /* * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix * keyboard controller * * Copyright (c) 2009-2011, NVIDIA Corporation. */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/input.h> #include <linux/platform_device.h> #include <linux/delay.h> #include <linux/io.h> #include <linux/interrupt.h> #include <linux/of.h> #include <linux/property.h> #include <linux/clk.h> #include <linux/slab.h> #include <linux/input/matrix_keypad.h> #include <linux/reset.h> #include <linux/err.h> #define KBC_MAX_KPENT … /* Maximum row/column supported by Tegra KBC yet is 16x8 */ #define KBC_MAX_GPIO … /* Maximum keys supported by Tegra KBC yet is 16 x 8*/ #define KBC_MAX_KEY … #define KBC_MAX_DEBOUNCE_CNT … /* KBC row scan time and delay for beginning the row scan. */ #define KBC_ROW_SCAN_TIME … #define KBC_ROW_SCAN_DLY … /* KBC uses a 32KHz clock so a cycle = 1/32Khz */ #define KBC_CYCLE_MS … /* KBC Registers */ /* KBC Control Register */ #define KBC_CONTROL_0 … #define KBC_FIFO_TH_CNT_SHIFT(cnt) … #define KBC_DEBOUNCE_CNT_SHIFT(cnt) … #define KBC_CONTROL_FIFO_CNT_INT_EN … #define KBC_CONTROL_KEYPRESS_INT_EN … #define KBC_CONTROL_KBC_EN … /* KBC Interrupt Register */ #define KBC_INT_0 … #define KBC_INT_FIFO_CNT_INT_STATUS … #define KBC_INT_KEYPRESS_INT_STATUS … #define KBC_ROW_CFG0_0 … #define KBC_COL_CFG0_0 … #define KBC_TO_CNT_0 … #define KBC_INIT_DLY_0 … #define KBC_RPT_DLY_0 … #define KBC_KP_ENT0_0 … #define KBC_KP_ENT1_0 … #define KBC_ROW0_MASK_0 … #define KBC_ROW_SHIFT … enum tegra_pin_type { … }; /* Tegra KBC hw support */ struct tegra_kbc_hw_support { … }; struct tegra_kbc_pin_cfg { … }; struct tegra_kbc { … }; static void tegra_kbc_report_released_keys(struct input_dev *input, unsigned short old_keycodes[], unsigned int old_num_keys, unsigned short new_keycodes[], unsigned int new_num_keys) { … } static void tegra_kbc_report_pressed_keys(struct input_dev *input, unsigned char scancodes[], unsigned short keycodes[], unsigned int num_pressed_keys) { … } static void tegra_kbc_report_keys(struct tegra_kbc *kbc) { … } static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable) { … } static void tegra_kbc_keypress_timer(struct timer_list *t) { … } static irqreturn_t tegra_kbc_isr(int irq, void *args) { … } static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter) { … } static void tegra_kbc_config_pins(struct tegra_kbc *kbc) { … } static int tegra_kbc_start(struct tegra_kbc *kbc) { … } static void tegra_kbc_stop(struct tegra_kbc *kbc) { … } static int tegra_kbc_open(struct input_dev *dev) { … } static void tegra_kbc_close(struct input_dev *dev) { … } static bool tegra_kbc_check_pin_cfg(const struct tegra_kbc *kbc, unsigned int *num_rows) { … } static int tegra_kbc_parse_dt(struct tegra_kbc *kbc) { … } static const struct tegra_kbc_hw_support tegra20_kbc_hw_support = …; static const struct tegra_kbc_hw_support tegra11_kbc_hw_support = …; static const struct of_device_id tegra_kbc_of_match[] = …; MODULE_DEVICE_TABLE(of, tegra_kbc_of_match); static int tegra_kbc_probe(struct platform_device *pdev) { … } static void tegra_kbc_set_keypress_interrupt(struct tegra_kbc *kbc, bool enable) { … } static int tegra_kbc_suspend(struct device *dev) { … } static int tegra_kbc_resume(struct device *dev) { … } static DEFINE_SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume); static struct platform_driver tegra_kbc_driver = …; module_platform_driver(…) …; MODULE_LICENSE(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_ALIAS(…) …;
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