/* * Cypress APA trackpad with I2C interface * * Author: Dudley Du <[email protected]> * * Copyright (C) 2014-2015 Cypress Semiconductor, Inc. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive for * more details. */ #ifndef _CYAPA_H #define _CYAPA_H #include <linux/firmware.h> /* APA trackpad firmware generation number. */ #define CYAPA_GEN_UNKNOWN … #define CYAPA_GEN3 … #define CYAPA_GEN5 … #define CYAPA_GEN6 … #define CYAPA_NAME … /* * Macros for SMBus communication */ #define SMBUS_READ … #define SMBUS_WRITE … #define SMBUS_ENCODE_IDX(cmd, idx) … #define SMBUS_ENCODE_RW(cmd, rw) … #define SMBUS_BYTE_BLOCK_CMD_MASK … #define SMBUS_GROUP_BLOCK_CMD_MASK … /* Commands for read/write registers of Cypress trackpad */ #define CYAPA_CMD_SOFT_RESET … #define CYAPA_CMD_POWER_MODE … #define CYAPA_CMD_DEV_STATUS … #define CYAPA_CMD_GROUP_DATA … #define CYAPA_CMD_GROUP_CMD … #define CYAPA_CMD_GROUP_QUERY … #define CYAPA_CMD_BL_STATUS … #define CYAPA_CMD_BL_HEAD … #define CYAPA_CMD_BL_CMD … #define CYAPA_CMD_BL_DATA … #define CYAPA_CMD_BL_ALL … #define CYAPA_CMD_BLK_PRODUCT_ID … #define CYAPA_CMD_BLK_HEAD … #define CYAPA_CMD_MAX_BASELINE … #define CYAPA_CMD_MIN_BASELINE … #define BL_HEAD_OFFSET … #define BL_DATA_OFFSET … #define BL_STATUS_SIZE … #define CYAPA_REG_MAP_SIZE … /* * Gen3 Operational Device Status Register * * bit 7: Valid interrupt source * bit 6 - 4: Reserved * bit 3 - 2: Power status * bit 1 - 0: Device status */ #define REG_OP_STATUS … #define OP_STATUS_SRC … #define OP_STATUS_POWER … #define OP_STATUS_DEV … #define OP_STATUS_MASK … /* * Operational Finger Count/Button Flags Register * * bit 7 - 4: Number of touched finger * bit 3: Valid data * bit 2: Middle Physical Button * bit 1: Right Physical Button * bit 0: Left physical Button */ #define REG_OP_DATA1 … #define OP_DATA_VALID … #define OP_DATA_MIDDLE_BTN … #define OP_DATA_RIGHT_BTN … #define OP_DATA_LEFT_BTN … #define OP_DATA_BTN_MASK … /* * Write-only command file register used to issue commands and * parameters to the bootloader. * The default value read from it is always 0x00. */ #define REG_BL_FILE … #define BL_FILE … /* * Bootloader Status Register * * bit 7: Busy * bit 6 - 5: Reserved * bit 4: Bootloader running * bit 3 - 2: Reserved * bit 1: Watchdog Reset * bit 0: Checksum valid */ #define REG_BL_STATUS … #define BL_STATUS_REV_6_5 … #define BL_STATUS_BUSY … #define BL_STATUS_RUNNING … #define BL_STATUS_REV_3_2 … #define BL_STATUS_WATCHDOG … #define BL_STATUS_CSUM_VALID … #define BL_STATUS_REV_MASK … /* * Bootloader Error Register * * bit 7: Invalid * bit 6: Invalid security key * bit 5: Bootloading * bit 4: Command checksum * bit 3: Flash protection error * bit 2: Flash checksum error * bit 1 - 0: Reserved */ #define REG_BL_ERROR … #define BL_ERROR_INVALID … #define BL_ERROR_INVALID_KEY … #define BL_ERROR_BOOTLOADING … #define BL_ERROR_CMD_CSUM … #define BL_ERROR_FLASH_PROT … #define BL_ERROR_FLASH_CSUM … #define BL_ERROR_RESERVED … #define BL_ERROR_NO_ERR_IDLE … #define BL_ERROR_NO_ERR_ACTIVE … #define CAPABILITY_BTN_SHIFT … #define CAPABILITY_LEFT_BTN_MASK … #define CAPABILITY_RIGHT_BTN_MASK … #define CAPABILITY_MIDDLE_BTN_MASK … #define CAPABILITY_BTN_MASK … #define PWR_MODE_MASK … #define PWR_MODE_FULL_ACTIVE … #define PWR_MODE_IDLE … #define PWR_MODE_SLEEP … #define PWR_MODE_BTN_ONLY … #define PWR_MODE_OFF … #define PWR_STATUS_MASK … #define PWR_STATUS_ACTIVE … #define PWR_STATUS_IDLE … #define PWR_STATUS_BTN_ONLY … #define PWR_STATUS_OFF … #define AUTOSUSPEND_DELAY … #define BTN_ONLY_MODE_NAME … #define OFF_MODE_NAME … /* Common macros for PIP interface. */ #define PIP_HID_DESCRIPTOR_ADDR … #define PIP_REPORT_DESCRIPTOR_ADDR … #define PIP_INPUT_REPORT_ADDR … #define PIP_OUTPUT_REPORT_ADDR … #define PIP_CMD_DATA_ADDR … #define PIP_RETRIEVE_DATA_STRUCTURE … #define PIP_CMD_CALIBRATE … #define PIP_BL_CMD_VERIFY_APP_INTEGRITY … #define PIP_BL_CMD_GET_BL_INFO … #define PIP_BL_CMD_PROGRAM_VERIFY_ROW … #define PIP_BL_CMD_LAUNCH_APP … #define PIP_BL_CMD_INITIATE_BL … #define PIP_INVALID_CMD … #define PIP_HID_DESCRIPTOR_SIZE … #define PIP_HID_APP_REPORT_ID … #define PIP_HID_BL_REPORT_ID … #define PIP_BL_CMD_REPORT_ID … #define PIP_BL_RESP_REPORT_ID … #define PIP_APP_CMD_REPORT_ID … #define PIP_APP_RESP_REPORT_ID … #define PIP_READ_SYS_INFO_CMD_LENGTH … #define PIP_BL_READ_APP_INFO_CMD_LENGTH … #define PIP_MIN_BL_CMD_LENGTH … #define PIP_MIN_BL_RESP_LENGTH … #define PIP_MIN_APP_CMD_LENGTH … #define PIP_MIN_APP_RESP_LENGTH … #define PIP_UNSUPPORTED_CMD_RESP_LENGTH … #define PIP_READ_SYS_INFO_RESP_LENGTH … #define PIP_BL_APP_INFO_RESP_LENGTH … #define PIP_BL_GET_INFO_RESP_LENGTH … #define PIP_BL_PLATFORM_VER_SHIFT … #define PIP_BL_PLATFORM_VER_MASK … #define PIP_PRODUCT_FAMILY_MASK … #define PIP_PRODUCT_FAMILY_TRACKPAD … #define PIP_DEEP_SLEEP_STATE_ON … #define PIP_DEEP_SLEEP_STATE_OFF … #define PIP_DEEP_SLEEP_STATE_MASK … #define PIP_APP_DEEP_SLEEP_REPORT_ID … #define PIP_DEEP_SLEEP_RESP_LENGTH … #define PIP_DEEP_SLEEP_OPCODE … #define PIP_DEEP_SLEEP_OPCODE_MASK … #define PIP_RESP_LENGTH_OFFSET … #define PIP_RESP_LENGTH_SIZE … #define PIP_RESP_REPORT_ID_OFFSET … #define PIP_RESP_RSVD_OFFSET … #define PIP_RESP_RSVD_KEY … #define PIP_RESP_BL_SOP_OFFSET … #define PIP_SOP_KEY … #define PIP_EOP_KEY … #define PIP_RESP_APP_CMD_OFFSET … #define GET_PIP_CMD_CODE(reg) … #define PIP_RESP_STATUS_OFFSET … #define VALID_CMD_RESP_HEADER(resp, cmd) … #define PIP_CMD_COMPLETE_SUCCESS(resp_data) … /* Variables to record latest gen5 trackpad power states. */ #define UNINIT_SLEEP_TIME … #define UNINIT_PWR_MODE … #define PIP_DEV_SET_PWR_STATE(cyapa, s) … #define PIP_DEV_GET_PWR_STATE(cyapa) … #define PIP_DEV_SET_SLEEP_TIME(cyapa, t) … #define PIP_DEV_GET_SLEEP_TIME(cyapa) … #define PIP_DEV_UNINIT_SLEEP_TIME(cyapa) … /* The touch.id is used as the MT slot id, thus max MT slot is 15 */ #define CYAPA_MAX_MT_SLOTS … struct cyapa; cb_sort; enum cyapa_pm_stage { … }; struct cyapa_dev_ops { … }; struct cyapa_pip_cmd_states { … }; cyapa_cmd_states; enum cyapa_state { … }; struct gen6_interval_setting { … }; /* The main device structure */ struct cyapa { … }; ssize_t cyapa_i2c_reg_read_block(struct cyapa *cyapa, u8 reg, size_t len, u8 *values); ssize_t cyapa_smbus_read_block(struct cyapa *cyapa, u8 cmd, size_t len, u8 *values); ssize_t cyapa_read_block(struct cyapa *cyapa, u8 cmd_idx, u8 *values); int cyapa_poll_state(struct cyapa *cyapa, unsigned int timeout); u8 cyapa_sleep_time_to_pwr_cmd(u16 sleep_time); u16 cyapa_pwr_cmd_to_sleep_time(u8 pwr_mode); ssize_t cyapa_i2c_pip_read(struct cyapa *cyapa, u8 *buf, size_t size); ssize_t cyapa_i2c_pip_write(struct cyapa *cyapa, u8 *buf, size_t size); int cyapa_empty_pip_output_data(struct cyapa *cyapa, u8 *buf, int *len, cb_sort func); int cyapa_i2c_pip_cmd_irq_sync(struct cyapa *cyapa, u8 *cmd, int cmd_len, u8 *resp_data, int *resp_len, unsigned long timeout, cb_sort func, bool irq_mode); int cyapa_pip_state_parse(struct cyapa *cyapa, u8 *reg_data, int len); bool cyapa_pip_sort_system_info_data(struct cyapa *cyapa, u8 *buf, int len); bool cyapa_sort_tsg_pip_bl_resp_data(struct cyapa *cyapa, u8 *data, int len); int cyapa_pip_deep_sleep(struct cyapa *cyapa, u8 state); bool cyapa_sort_tsg_pip_app_resp_data(struct cyapa *cyapa, u8 *data, int len); int cyapa_pip_bl_exit(struct cyapa *cyapa); int cyapa_pip_bl_enter(struct cyapa *cyapa); bool cyapa_is_pip_bl_mode(struct cyapa *cyapa); bool cyapa_is_pip_app_mode(struct cyapa *cyapa); int cyapa_pip_cmd_state_initialize(struct cyapa *cyapa); int cyapa_pip_resume_scanning(struct cyapa *cyapa); int cyapa_pip_suspend_scanning(struct cyapa *cyapa); int cyapa_pip_check_fw(struct cyapa *cyapa, const struct firmware *fw); int cyapa_pip_bl_initiate(struct cyapa *cyapa, const struct firmware *fw); int cyapa_pip_do_fw_update(struct cyapa *cyapa, const struct firmware *fw); int cyapa_pip_bl_activate(struct cyapa *cyapa); int cyapa_pip_bl_deactivate(struct cyapa *cyapa); ssize_t cyapa_pip_do_calibrate(struct device *dev, struct device_attribute *attr, const char *buf, size_t count); int cyapa_pip_set_proximity(struct cyapa *cyapa, bool enable); bool cyapa_pip_irq_cmd_handler(struct cyapa *cyapa); int cyapa_pip_irq_handler(struct cyapa *cyapa); extern u8 pip_read_sys_info[]; extern u8 pip_bl_read_app_info[]; extern const char product_id[]; extern const struct cyapa_dev_ops cyapa_gen3_ops; extern const struct cyapa_dev_ops cyapa_gen5_ops; extern const struct cyapa_dev_ops cyapa_gen6_ops; #endif
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