linux/drivers/input/misc/iqs7222.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Azoteq IQS7222A/B/C/D Capacitive Touch Controller
 *
 * Copyright (C) 2022 Jeff LaBundy <[email protected]>
 */

#include <linux/bits.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/input.h>
#include <linux/input/touchscreen.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/ktime.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/property.h>
#include <linux/slab.h>
#include <linux/unaligned.h>

#define IQS7222_PROD_NUM
#define IQS7222_PROD_NUM_A
#define IQS7222_PROD_NUM_B
#define IQS7222_PROD_NUM_C
#define IQS7222_PROD_NUM_D

#define IQS7222_SYS_STATUS
#define IQS7222_SYS_STATUS_RESET
#define IQS7222_SYS_STATUS_ATI_ERROR
#define IQS7222_SYS_STATUS_ATI_ACTIVE

#define IQS7222_CHAN_SETUP_0_REF_MODE_MASK
#define IQS7222_CHAN_SETUP_0_REF_MODE_FOLLOW
#define IQS7222_CHAN_SETUP_0_REF_MODE_REF
#define IQS7222_CHAN_SETUP_0_CHAN_EN

#define IQS7222_SLDR_SETUP_0_CHAN_CNT_MASK
#define IQS7222_SLDR_SETUP_2_RES_MASK
#define IQS7222_SLDR_SETUP_2_RES_SHIFT
#define IQS7222_SLDR_SETUP_2_TOP_SPEED_MASK

#define IQS7222_GPIO_SETUP_0_GPIO_EN

#define IQS7222_SYS_SETUP
#define IQS7222_SYS_SETUP_INTF_MODE_MASK
#define IQS7222_SYS_SETUP_INTF_MODE_TOUCH
#define IQS7222_SYS_SETUP_INTF_MODE_EVENT
#define IQS7222_SYS_SETUP_PWR_MODE_MASK
#define IQS7222_SYS_SETUP_PWR_MODE_AUTO
#define IQS7222_SYS_SETUP_REDO_ATI
#define IQS7222_SYS_SETUP_ACK_RESET

#define IQS7222_EVENT_MASK_ATI
#define IQS7222_EVENT_MASK_SLDR
#define IQS7222_EVENT_MASK_TPAD
#define IQS7222_EVENT_MASK_TOUCH
#define IQS7222_EVENT_MASK_PROX

#define IQS7222_COMMS_HOLD
#define IQS7222_COMMS_ERROR
#define IQS7222_COMMS_RETRY_MS
#define IQS7222_COMMS_TIMEOUT_MS
#define IQS7222_RESET_TIMEOUT_MS
#define IQS7222_ATI_TIMEOUT_MS

#define IQS7222_MAX_COLS_STAT
#define IQS7222_MAX_COLS_CYCLE
#define IQS7222_MAX_COLS_GLBL
#define IQS7222_MAX_COLS_BTN
#define IQS7222_MAX_COLS_CHAN
#define IQS7222_MAX_COLS_FILT
#define IQS7222_MAX_COLS_SLDR
#define IQS7222_MAX_COLS_TPAD
#define IQS7222_MAX_COLS_GPIO
#define IQS7222_MAX_COLS_SYS

#define IQS7222_MAX_CHAN
#define IQS7222_MAX_SLDR

#define IQS7222_NUM_RETRIES
#define IQS7222_REG_OFFSET

enum iqs7222_reg_key_id {};

enum iqs7222_reg_grp_id {};

static const char * const iqs7222_reg_grp_names[IQS7222_NUM_REG_GRPS] =;

static const unsigned int iqs7222_max_cols[IQS7222_NUM_REG_GRPS] =;

static const unsigned int iqs7222_gpio_links[] =;

struct iqs7222_event_desc {};

static const struct iqs7222_event_desc iqs7222_kp_events[] =;

static const struct iqs7222_event_desc iqs7222_sl_events[] =;

static const struct iqs7222_event_desc iqs7222_tp_events[] =;

struct iqs7222_reg_grp_desc {};

struct iqs7222_dev_desc {};

static const struct iqs7222_dev_desc iqs7222_devs[] =;

struct iqs7222_prop_desc {};

static const struct iqs7222_prop_desc iqs7222_props[] =;

struct iqs7222_private {};

static u16 *iqs7222_setup(struct iqs7222_private *iqs7222,
			  enum iqs7222_reg_grp_id reg_grp, int row)
{}

static int iqs7222_irq_poll(struct iqs7222_private *iqs7222, u16 timeout_ms)
{}

static int iqs7222_hard_reset(struct iqs7222_private *iqs7222)
{}

static int iqs7222_force_comms(struct iqs7222_private *iqs7222)
{}

static int iqs7222_read_burst(struct iqs7222_private *iqs7222,
			      u16 reg, void *val, u16 num_val)
{}

static int iqs7222_read_word(struct iqs7222_private *iqs7222, u16 reg, u16 *val)
{}

static int iqs7222_write_burst(struct iqs7222_private *iqs7222,
			       u16 reg, const void *val, u16 num_val)
{}

static int iqs7222_write_word(struct iqs7222_private *iqs7222, u16 reg, u16 val)
{}

static int iqs7222_ati_trigger(struct iqs7222_private *iqs7222)
{}

static int iqs7222_dev_init(struct iqs7222_private *iqs7222, int dir)
{}

static int iqs7222_dev_info(struct iqs7222_private *iqs7222)
{}

static int iqs7222_gpio_select(struct iqs7222_private *iqs7222,
			       struct fwnode_handle *child_node,
			       int child_enable, u16 child_link)
{}

static int iqs7222_parse_props(struct iqs7222_private *iqs7222,
			       struct fwnode_handle *reg_grp_node,
			       int reg_grp_index,
			       enum iqs7222_reg_grp_id reg_grp,
			       enum iqs7222_reg_key_id reg_key)
{}

static int iqs7222_parse_event(struct iqs7222_private *iqs7222,
			       struct fwnode_handle *event_node,
			       int reg_grp_index,
			       enum iqs7222_reg_grp_id reg_grp,
			       enum iqs7222_reg_key_id reg_key,
			       u16 event_enable, u16 event_link,
			       unsigned int *event_type,
			       unsigned int *event_code)
{}

static int iqs7222_parse_cycle(struct iqs7222_private *iqs7222,
			       struct fwnode_handle *cycle_node, int cycle_index)
{}

static int iqs7222_parse_chan(struct iqs7222_private *iqs7222,
			      struct fwnode_handle *chan_node, int chan_index)
{}

static int iqs7222_parse_sldr(struct iqs7222_private *iqs7222,
			      struct fwnode_handle *sldr_node, int sldr_index)
{}

static int iqs7222_parse_tpad(struct iqs7222_private *iqs7222,
			      struct fwnode_handle *tpad_node, int tpad_index)
{}

static int (*iqs7222_parse_extra[IQS7222_NUM_REG_GRPS])
				(struct iqs7222_private *iqs7222,
				 struct fwnode_handle *reg_grp_node,
				 int reg_grp_index) =;

static int iqs7222_parse_reg_grp(struct iqs7222_private *iqs7222,
				 enum iqs7222_reg_grp_id reg_grp,
				 int reg_grp_index)
{}

static int iqs7222_parse_all(struct iqs7222_private *iqs7222)
{}

static int iqs7222_report(struct iqs7222_private *iqs7222)
{}

static irqreturn_t iqs7222_irq(int irq, void *context)
{}

static int iqs7222_probe(struct i2c_client *client)
{}

static const struct of_device_id iqs7222_of_match[] =;
MODULE_DEVICE_TABLE(of, iqs7222_of_match);

static struct i2c_driver iqs7222_i2c_driver =;
module_i2c_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();