// SPDX-License-Identifier: GPL-2.0-only /* * An SPI driver for the Philips PCF2123 RTC * Copyright 2009 Cyber Switching, Inc. * * Author: Chris Verges <[email protected]> * Maintainers: http://www.cyberswitching.com * * based on the RS5C348 driver in this same directory. * * Thanks to Christian Pellegrin <[email protected]> for * the sysfs contributions to this driver. * * Please note that the CS is active high, so platform data * should look something like: * * static struct spi_board_info ek_spi_devices[] = { * ... * { * .modalias = "rtc-pcf2123", * .chip_select = 1, * .controller_data = (void *)AT91_PIN_PA10, * .max_speed_hz = 1000 * 1000, * .mode = SPI_CS_HIGH, * .bus_num = 0, * }, * ... *}; */ #include <linux/bcd.h> #include <linux/delay.h> #include <linux/device.h> #include <linux/errno.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/of.h> #include <linux/string.h> #include <linux/slab.h> #include <linux/rtc.h> #include <linux/spi/spi.h> #include <linux/module.h> #include <linux/regmap.h> /* REGISTERS */ #define PCF2123_REG_CTRL1 … #define PCF2123_REG_CTRL2 … #define PCF2123_REG_SC … #define PCF2123_REG_MN … #define PCF2123_REG_HR … #define PCF2123_REG_DM … #define PCF2123_REG_DW … #define PCF2123_REG_MO … #define PCF2123_REG_YR … #define PCF2123_REG_ALRM_MN … #define PCF2123_REG_ALRM_HR … #define PCF2123_REG_ALRM_DM … #define PCF2123_REG_ALRM_DW … #define PCF2123_REG_OFFSET … #define PCF2123_REG_TMR_CLKOUT … #define PCF2123_REG_CTDWN_TMR … /* PCF2123_REG_CTRL1 BITS */ #define CTRL1_CLEAR … #define CTRL1_CORR_INT … #define CTRL1_12_HOUR … #define CTRL1_SW_RESET … #define CTRL1_STOP … #define CTRL1_EXT_TEST … /* PCF2123_REG_CTRL2 BITS */ #define CTRL2_TIE … #define CTRL2_AIE … #define CTRL2_TF … #define CTRL2_AF … #define CTRL2_TI_TP … #define CTRL2_MSF … #define CTRL2_SI … #define CTRL2_MI … /* PCF2123_REG_SC BITS */ #define OSC_HAS_STOPPED … /* PCF2123_REG_ALRM_XX BITS */ #define ALRM_DISABLE … /* PCF2123_REG_TMR_CLKOUT BITS */ #define CD_TMR_4096KHZ … #define CD_TMR_64HZ … #define CD_TMR_1HZ … #define CD_TMR_60th_HZ … #define CD_TMR_TE … /* PCF2123_REG_OFFSET BITS */ #define OFFSET_SIGN_BIT … #define OFFSET_COARSE … #define OFFSET_STEP … #define OFFSET_MASK … /* READ/WRITE ADDRESS BITS */ #define PCF2123_WRITE … #define PCF2123_READ … static struct spi_driver pcf2123_driver; struct pcf2123_data { … }; static const struct regmap_config pcf2123_regmap_config = …; static int pcf2123_read_offset(struct device *dev, long *offset) { … } /* * The offset register is a 7 bit signed value with a coarse bit in bit 7. * The main difference between the two is normal offset adjusts the first * second of n minutes every other hour, with 61, 62 and 63 being shoved * into the 60th minute. * The coarse adjustment does the same, but every hour. * the two overlap, with every even normal offset value corresponding * to a coarse offset. Based on this algorithm, it seems that despite the * name, coarse offset is a better fit for overlapping values. */ static int pcf2123_set_offset(struct device *dev, long offset) { … } static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm) { … } static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm) { … } static int pcf2123_rtc_alarm_irq_enable(struct device *dev, unsigned int en) { … } static int pcf2123_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) { … } static int pcf2123_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) { … } static irqreturn_t pcf2123_rtc_irq(int irq, void *dev) { … } static int pcf2123_reset(struct device *dev) { … } static const struct rtc_class_ops pcf2123_rtc_ops = …; static int pcf2123_probe(struct spi_device *spi) { … } #ifdef CONFIG_OF static const struct of_device_id pcf2123_dt_ids[] = …; MODULE_DEVICE_TABLE(of, pcf2123_dt_ids); #endif static const struct spi_device_id pcf2123_spi_ids[] = …; MODULE_DEVICE_TABLE(spi, pcf2123_spi_ids); static struct spi_driver pcf2123_driver = …; module_spi_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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