linux/drivers/rtc/rtc-stm32.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) STMicroelectronics 2017
 * Author:  Amelie Delaunay <[email protected]>
 */

#include <linux/bcd.h>
#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/errno.h>
#include <linux/iopoll.h>
#include <linux/ioport.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/platform_device.h>
#include <linux/pm_wakeirq.h>
#include <linux/regmap.h>
#include <linux/rtc.h>

#define DRIVER_NAME

/* STM32_RTC_TR bit fields  */
#define STM32_RTC_TR_SEC_SHIFT
#define STM32_RTC_TR_SEC
#define STM32_RTC_TR_MIN_SHIFT
#define STM32_RTC_TR_MIN
#define STM32_RTC_TR_HOUR_SHIFT
#define STM32_RTC_TR_HOUR

/* STM32_RTC_DR bit fields */
#define STM32_RTC_DR_DATE_SHIFT
#define STM32_RTC_DR_DATE
#define STM32_RTC_DR_MONTH_SHIFT
#define STM32_RTC_DR_MONTH
#define STM32_RTC_DR_WDAY_SHIFT
#define STM32_RTC_DR_WDAY
#define STM32_RTC_DR_YEAR_SHIFT
#define STM32_RTC_DR_YEAR

/* STM32_RTC_CR bit fields */
#define STM32_RTC_CR_FMT
#define STM32_RTC_CR_ALRAE
#define STM32_RTC_CR_ALRAIE
#define STM32_RTC_CR_OSEL
#define STM32_RTC_CR_OSEL_ALARM_A
#define STM32_RTC_CR_COE
#define STM32_RTC_CR_TAMPOE
#define STM32_RTC_CR_TAMPALRM_TYPE
#define STM32_RTC_CR_OUT2EN

/* STM32_RTC_ISR/STM32_RTC_ICSR bit fields */
#define STM32_RTC_ISR_ALRAWF
#define STM32_RTC_ISR_INITS
#define STM32_RTC_ISR_RSF
#define STM32_RTC_ISR_INITF
#define STM32_RTC_ISR_INIT
#define STM32_RTC_ISR_ALRAF

/* STM32_RTC_PRER bit fields */
#define STM32_RTC_PRER_PRED_S_SHIFT
#define STM32_RTC_PRER_PRED_S
#define STM32_RTC_PRER_PRED_A_SHIFT
#define STM32_RTC_PRER_PRED_A

/* STM32_RTC_ALRMAR and STM32_RTC_ALRMBR bit fields */
#define STM32_RTC_ALRMXR_SEC_SHIFT
#define STM32_RTC_ALRMXR_SEC
#define STM32_RTC_ALRMXR_SEC_MASK
#define STM32_RTC_ALRMXR_MIN_SHIFT
#define STM32_RTC_ALRMXR_MIN
#define STM32_RTC_ALRMXR_MIN_MASK
#define STM32_RTC_ALRMXR_HOUR_SHIFT
#define STM32_RTC_ALRMXR_HOUR
#define STM32_RTC_ALRMXR_PM
#define STM32_RTC_ALRMXR_HOUR_MASK
#define STM32_RTC_ALRMXR_DATE_SHIFT
#define STM32_RTC_ALRMXR_DATE
#define STM32_RTC_ALRMXR_WDSEL
#define STM32_RTC_ALRMXR_WDAY_SHIFT
#define STM32_RTC_ALRMXR_WDAY
#define STM32_RTC_ALRMXR_DATE_MASK

/* STM32_RTC_SR/_SCR bit fields */
#define STM32_RTC_SR_ALRA

/* STM32_RTC_CFGR bit fields */
#define STM32_RTC_CFGR_OUT2_RMP
#define STM32_RTC_CFGR_LSCOEN
#define STM32_RTC_CFGR_LSCOEN_OUT1
#define STM32_RTC_CFGR_LSCOEN_OUT2_RMP

/* STM32_RTC_VERR bit fields */
#define STM32_RTC_VERR_MINREV_SHIFT
#define STM32_RTC_VERR_MINREV
#define STM32_RTC_VERR_MAJREV_SHIFT
#define STM32_RTC_VERR_MAJREV

/* STM32_RTC_SECCFGR bit fields */
#define STM32_RTC_SECCFGR
#define STM32_RTC_SECCFGR_ALRA_SEC
#define STM32_RTC_SECCFGR_INIT_SEC
#define STM32_RTC_SECCFGR_SEC

/* STM32_RTC_RXCIDCFGR bit fields */
#define STM32_RTC_RXCIDCFGR(x)
#define STM32_RTC_RXCIDCFGR_CFEN
#define STM32_RTC_RXCIDCFGR_CID
#define STM32_RTC_RXCIDCFGR_CID1

/* STM32_RTC_WPR key constants */
#define RTC_WPR_1ST_KEY
#define RTC_WPR_2ND_KEY
#define RTC_WPR_WRONG_KEY

/* Max STM32 RTC register offset is 0x3FC */
#define UNDEF_REG

/* STM32 RTC driver time helpers */
#define SEC_PER_DAY

/* STM32 RTC pinctrl helpers */
#define STM32_RTC_PINMUX(_name, _action, ...)

struct stm32_rtc;

struct stm32_rtc_registers {};

struct stm32_rtc_events {};

struct stm32_rtc_data {};

struct stm32_rtc {};

struct stm32_rtc_rif_resource {};

static const struct stm32_rtc_rif_resource STM32_RTC_RES_ALRA =;
static const struct stm32_rtc_rif_resource STM32_RTC_RES_INIT =;

static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc)
{}

static void stm32_rtc_wpr_lock(struct stm32_rtc *rtc)
{}

enum stm32_rtc_pin_name {};

static const struct pinctrl_pin_desc stm32_rtc_pinctrl_pins[] =;

static int stm32_rtc_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
{}

static const char *stm32_rtc_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
						    unsigned int selector)
{}

static int stm32_rtc_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
					    unsigned int selector,
					    const unsigned int **pins,
					    unsigned int *num_pins)
{}

static const struct pinctrl_ops stm32_rtc_pinctrl_ops =;

struct stm32_rtc_pinmux_func {};

static int stm32_rtc_pinmux_action_alarm(struct pinctrl_dev *pctldev, unsigned int pin)
{}

static int stm32_rtc_pinmux_lsco_available(struct pinctrl_dev *pctldev, unsigned int pin)
{}

static int stm32_rtc_pinmux_action_lsco(struct pinctrl_dev *pctldev, unsigned int pin)
{}

static const struct stm32_rtc_pinmux_func stm32_rtc_pinmux_functions[] =;

static int stm32_rtc_pinmux_get_functions_count(struct pinctrl_dev *pctldev)
{}

static const char *stm32_rtc_pinmux_get_fname(struct pinctrl_dev *pctldev, unsigned int selector)
{}

static int stm32_rtc_pinmux_get_groups(struct pinctrl_dev *pctldev, unsigned int selector,
				       const char * const **groups, unsigned int * const num_groups)
{}

static int stm32_rtc_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int selector,
				    unsigned int group)
{}

static const struct pinmux_ops stm32_rtc_pinmux_ops =;

static struct pinctrl_desc stm32_rtc_pdesc =;

static int stm32_rtc_enter_init_mode(struct stm32_rtc *rtc)
{}

static void stm32_rtc_exit_init_mode(struct stm32_rtc *rtc)
{}

static int stm32_rtc_wait_sync(struct stm32_rtc *rtc)
{}

static void stm32_rtc_clear_event_flags(struct stm32_rtc *rtc,
					unsigned int flags)
{}

static irqreturn_t stm32_rtc_alarm_irq(int irq, void *dev_id)
{}

/* Convert rtc_time structure from bin to bcd format */
static void tm2bcd(struct rtc_time *tm)
{}

/* Convert rtc_time structure from bcd to bin format */
static void bcd2tm(struct rtc_time *tm)
{}

static int stm32_rtc_read_time(struct device *dev, struct rtc_time *tm)
{}

static int stm32_rtc_set_time(struct device *dev, struct rtc_time *tm)
{}

static int stm32_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{}

static int stm32_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{}

static int stm32_rtc_valid_alrm(struct device *dev, struct rtc_time *tm)
{}

static int stm32_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{}

static const struct rtc_class_ops stm32_rtc_ops =;

static void stm32_rtc_clear_events(struct stm32_rtc *rtc,
				   unsigned int flags)
{}

static const struct stm32_rtc_data stm32_rtc_data =;

static const struct stm32_rtc_data stm32h7_rtc_data =;

static void stm32mp1_rtc_clear_events(struct stm32_rtc *rtc,
				      unsigned int flags)
{}

static const struct stm32_rtc_data stm32mp1_data =;

static const struct stm32_rtc_data stm32mp25_data =;

static const struct of_device_id stm32_rtc_of_match[] =;
MODULE_DEVICE_TABLE(of, stm32_rtc_of_match);

static void stm32_rtc_clean_outs(struct stm32_rtc *rtc)
{}

static int stm32_rtc_check_rif(struct stm32_rtc *stm32_rtc,
			       struct stm32_rtc_rif_resource res)
{}

static int stm32_rtc_init(struct platform_device *pdev,
			  struct stm32_rtc *rtc)
{}

static int stm32_rtc_probe(struct platform_device *pdev)
{}

static void stm32_rtc_remove(struct platform_device *pdev)
{}

static int stm32_rtc_suspend(struct device *dev)
{}

static int stm32_rtc_resume(struct device *dev)
{}

static const struct dev_pm_ops stm32_rtc_pm_ops =;

static struct platform_driver stm32_rtc_driver =;

module_platform_driver();

MODULE_ALIAS();
MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();