/* SPDX-License-Identifier: GPL-2.0-only */ /* ------------------------------------------------------------------------- */ /* i2c-iop3xx.h algorithm driver definitions private to i2c-iop3xx.c */ /* ------------------------------------------------------------------------- */ /* Copyright (C) 2003 Peter Milne, D-TACQ Solutions Ltd * <Peter dot Milne at D hyphen TACQ dot com> */ /* ------------------------------------------------------------------------- */ #ifndef I2C_IOP3XX_H #define I2C_IOP3XX_H … /* * iop321 hardware bit definitions */ #define IOP3XX_ICR_FAST_MODE … #define IOP3XX_ICR_UNIT_RESET … #define IOP3XX_ICR_SAD_IE … #define IOP3XX_ICR_ALD_IE … #define IOP3XX_ICR_SSD_IE … #define IOP3XX_ICR_BERR_IE … #define IOP3XX_ICR_RXFULL_IE … #define IOP3XX_ICR_TXEMPTY_IE … #define IOP3XX_ICR_GCD … /* * IOP3XX_ICR_GCD: 1 disables response as slave. "This bit must be set * when sending a master mode general call message from the I2C unit" */ #define IOP3XX_ICR_UE … /* * "NOTE: To avoid I2C bus integrity problems, * the user needs to ensure that the GPIO Output Data Register - * GPOD bits associated with an I2C port are cleared prior to setting * the enable bit for that I2C serial port. * The user prepares to enable I2C port 0 and * I2C port 1 by clearing GPOD bits 7:6 and GPOD bits 5:4, respectively. */ #define IOP3XX_ICR_SCLEN … #define IOP3XX_ICR_MABORT … #define IOP3XX_ICR_TBYTE … #define IOP3XX_ICR_NACK … #define IOP3XX_ICR_MSTOP … #define IOP3XX_ICR_MSTART … #define IOP3XX_ISR_BERRD … #define IOP3XX_ISR_SAD … #define IOP3XX_ISR_GCAD … #define IOP3XX_ISR_RXFULL … #define IOP3XX_ISR_TXEMPTY … #define IOP3XX_ISR_ALD … #define IOP3XX_ISR_SSD … #define IOP3XX_ISR_BBUSY … #define IOP3XX_ISR_UNITBUSY … #define IOP3XX_ISR_NACK … #define IOP3XX_ISR_RXREAD … #define IOP3XX_ISR_CLEARBITS … #define IOP3XX_ISAR_SAMASK … #define IOP3XX_IDBR_MASK … #define IOP3XX_IBMR_SCL … #define IOP3XX_IBMR_SDA … #define IOP3XX_GPOD_I2C0 … #define IOP3XX_GPOD_I2C1 … #define MYSAR … #define I2C_ERR … #define I2C_ERR_BERR … #define I2C_ERR_ALD … #define CR_OFFSET … #define SR_OFFSET … #define SAR_OFFSET … #define DBR_OFFSET … #define CCR_OFFSET … #define BMR_OFFSET … #define IOP3XX_I2C_IO_SIZE … struct i2c_algo_iop3xx_data { … }; #endif /* I2C_IOP3XX_H */
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