// SPDX-License-Identifier: GPL-2.0+ /* * Freescale MXS I2C bus driver * * Copyright (C) 2012-2013 Marek Vasut <[email protected]> * Copyright (C) 2011-2012 Wolfram Sang, Pengutronix e.K. * * based on a (non-working) driver which was: * * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. */ #include <linux/slab.h> #include <linux/device.h> #include <linux/module.h> #include <linux/i2c.h> #include <linux/err.h> #include <linux/interrupt.h> #include <linux/completion.h> #include <linux/platform_device.h> #include <linux/jiffies.h> #include <linux/io.h> #include <linux/stmp_device.h> #include <linux/of.h> #include <linux/dma-mapping.h> #include <linux/dmaengine.h> #include <linux/dma/mxs-dma.h> #define DRIVER_NAME … #define MXS_I2C_CTRL0 … #define MXS_I2C_CTRL0_SET … #define MXS_I2C_CTRL0_CLR … #define MXS_I2C_CTRL0_SFTRST … #define MXS_I2C_CTRL0_RUN … #define MXS_I2C_CTRL0_SEND_NAK_ON_LAST … #define MXS_I2C_CTRL0_PIO_MODE … #define MXS_I2C_CTRL0_RETAIN_CLOCK … #define MXS_I2C_CTRL0_POST_SEND_STOP … #define MXS_I2C_CTRL0_PRE_SEND_START … #define MXS_I2C_CTRL0_MASTER_MODE … #define MXS_I2C_CTRL0_DIRECTION … #define MXS_I2C_CTRL0_XFER_COUNT(v) … #define MXS_I2C_TIMING0 … #define MXS_I2C_TIMING1 … #define MXS_I2C_TIMING2 … #define MXS_I2C_CTRL1 … #define MXS_I2C_CTRL1_SET … #define MXS_I2C_CTRL1_CLR … #define MXS_I2C_CTRL1_CLR_GOT_A_NAK … #define MXS_I2C_CTRL1_BUS_FREE_IRQ … #define MXS_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ … #define MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ … #define MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ … #define MXS_I2C_CTRL1_EARLY_TERM_IRQ … #define MXS_I2C_CTRL1_MASTER_LOSS_IRQ … #define MXS_I2C_CTRL1_SLAVE_STOP_IRQ … #define MXS_I2C_CTRL1_SLAVE_IRQ … #define MXS_I2C_STAT … #define MXS_I2C_STAT_GOT_A_NAK … #define MXS_I2C_STAT_BUS_BUSY … #define MXS_I2C_STAT_CLK_GEN_BUSY … #define MXS_I2C_DATA(i2c) … #define MXS_I2C_DEBUG0_CLR(i2c) … #define MXS_I2C_DEBUG0_DMAREQ … #define MXS_I2C_IRQ_MASK … #define MXS_CMD_I2C_SELECT … #define MXS_CMD_I2C_WRITE … #define MXS_CMD_I2C_READ … enum mxs_i2c_devtype { … }; /** * struct mxs_i2c_dev - per device, private MXS-I2C data * * @dev: driver model device node * @dev_type: distinguish i.MX23/i.MX28 features * @regs: IO registers pointer * @cmd_complete: completion object for transaction wait * @cmd_err: error code for last transaction * @adapter: i2c subsystem adapter node */ struct mxs_i2c_dev { … }; static int mxs_i2c_reset(struct mxs_i2c_dev *i2c) { … } static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c) { … } static void mxs_i2c_dma_irq_callback(void *param) { … } static int mxs_i2c_dma_setup_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, u8 *buf, uint32_t flags) { … } static int mxs_i2c_pio_wait_xfer_end(struct mxs_i2c_dev *i2c) { … } static int mxs_i2c_pio_check_error_state(struct mxs_i2c_dev *i2c) { … } static void mxs_i2c_pio_trigger_cmd(struct mxs_i2c_dev *i2c, u32 cmd) { … } /* * Start WRITE transaction on the I2C bus. By studying i.MX23 datasheet, * CTRL0::PIO_MODE bit description clarifies the order in which the registers * must be written during PIO mode operation. First, the CTRL0 register has * to be programmed with all the necessary bits but the RUN bit. Then the * payload has to be written into the DATA register. Finally, the transmission * is executed by setting the RUN bit in CTRL0. */ static void mxs_i2c_pio_trigger_write_cmd(struct mxs_i2c_dev *i2c, u32 cmd, u32 data) { … } static int mxs_i2c_pio_setup_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, uint32_t flags) { … } /* * Low level master read/write transaction. */ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop) { … } static int mxs_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) { … } static u32 mxs_i2c_func(struct i2c_adapter *adap) { … } static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id) { … } static const struct i2c_algorithm mxs_i2c_algo = …; static const struct i2c_adapter_quirks mxs_i2c_quirks = …; static void mxs_i2c_derive_timing(struct mxs_i2c_dev *i2c, uint32_t speed) { … } static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c) { … } static const struct of_device_id mxs_i2c_dt_ids[] = …; MODULE_DEVICE_TABLE(of, mxs_i2c_dt_ids); static int mxs_i2c_probe(struct platform_device *pdev) { … } static void mxs_i2c_remove(struct platform_device *pdev) { … } static struct platform_driver mxs_i2c_driver = …; static int __init mxs_i2c_init(void) { … } subsys_initcall(mxs_i2c_init); static void __exit mxs_i2c_exit(void) { … } module_exit(mxs_i2c_exit); MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; MODULE_ALIAS(…) …;
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