// SPDX-License-Identifier: BSD-3-Clause /* * Copyright (c) 2020, MIPI Alliance, Inc. * * Author: Nicolas Pitre <[email protected]> * * Note: The I3C HCI v2.0 spec is still in flux. The IBI support is based on * v1.x of the spec and v2.0 will likely be split out. */ #include <linux/bitfield.h> #include <linux/device.h> #include <linux/dma-mapping.h> #include <linux/errno.h> #include <linux/i3c/master.h> #include <linux/io.h> #include "hci.h" #include "cmd.h" #include "ibi.h" /* * Software Parameter Values (somewhat arb itrary for now). * Some of them could be determined at run time eventually. */ #define XFER_RINGS … #define XFER_RING_ENTRIES … #define IBI_RINGS … #define IBI_STATUS_RING_ENTRIES … #define IBI_CHUNK_CACHELINES … #define IBI_CHUNK_POOL_SIZE … /* * Ring Header Preamble */ #define rhs_reg_read(r) … #define rhs_reg_write(r, v) … #define RHS_CONTROL … #define PREAMBLE_SIZE … #define HEADER_SIZE … #define MAX_HEADER_COUNT_CAP … #define MAX_HEADER_COUNT … #define RHS_RHn_OFFSET(n) … /* * Ring Header (Per-Ring Bundle) */ #define rh_reg_read(r) … #define rh_reg_write(r, v) … #define RH_CR_SETUP … #define CR_XFER_STRUCT_SIZE … #define CR_RESP_STRUCT_SIZE … #define CR_RING_SIZE … #define RH_IBI_SETUP … #define IBI_STATUS_STRUCT_SIZE … #define IBI_STATUS_RING_SIZE … #define IBI_DATA_CHUNK_SIZE … #define IBI_DATA_CHUNK_COUNT … #define RH_CHUNK_CONTROL … #define RH_INTR_STATUS … #define RH_INTR_STATUS_ENABLE … #define RH_INTR_SIGNAL_ENABLE … #define RH_INTR_FORCE … #define INTR_IBI_READY … #define INTR_TRANSFER_COMPLETION … #define INTR_RING_OP … #define INTR_TRANSFER_ERR … #define INTR_WARN_INS_STOP_MODE … #define INTR_IBI_RING_FULL … #define INTR_TRANSFER_ABORT … #define RH_RING_STATUS … #define RING_STATUS_LOCKED … #define RING_STATUS_ABORTED … #define RING_STATUS_RUNNING … #define RING_STATUS_ENABLED … #define RH_RING_CONTROL … #define RING_CTRL_ABORT … #define RING_CTRL_RUN_STOP … #define RING_CTRL_ENABLE … #define RH_RING_OPERATION1 … #define RING_OP1_IBI_DEQ_PTR … #define RING_OP1_CR_SW_DEQ_PTR … #define RING_OP1_CR_ENQ_PTR … #define RH_RING_OPERATION2 … #define RING_OP2_IBI_ENQ_PTR … #define RING_OP2_CR_DEQ_PTR … #define RH_CMD_RING_BASE_LO … #define RH_CMD_RING_BASE_HI … #define RH_RESP_RING_BASE_LO … #define RH_RESP_RING_BASE_HI … #define RH_IBI_STATUS_RING_BASE_LO … #define RH_IBI_STATUS_RING_BASE_HI … #define RH_IBI_DATA_RING_BASE_LO … #define RH_IBI_DATA_RING_BASE_HI … #define RH_CMD_RING_SG … #define RH_RESP_RING_SG … #define RH_IBI_STATUS_RING_SG … #define RH_IBI_DATA_RING_SG … #define RING_SG_BLP … #define RING_SG_LIST_SIZE … /* * Data Buffer Descriptor (in memory) */ #define DATA_BUF_BLP … #define DATA_BUF_IOC … #define DATA_BUF_BLOCK_SIZE … struct hci_rh_data { … }; struct hci_rings_data { … }; struct hci_dma_dev_ibi_data { … }; static void hci_dma_cleanup(struct i3c_hci *hci) { … } static int hci_dma_init(struct i3c_hci *hci) { … } static void hci_dma_unmap_xfer(struct i3c_hci *hci, struct hci_xfer *xfer_list, unsigned int n) { … } static int hci_dma_queue_xfer(struct i3c_hci *hci, struct hci_xfer *xfer_list, int n) { … } static bool hci_dma_dequeue_xfer(struct i3c_hci *hci, struct hci_xfer *xfer_list, int n) { … } static void hci_dma_xfer_done(struct i3c_hci *hci, struct hci_rh_data *rh) { … } static int hci_dma_request_ibi(struct i3c_hci *hci, struct i3c_dev_desc *dev, const struct i3c_ibi_setup *req) { … } static void hci_dma_free_ibi(struct i3c_hci *hci, struct i3c_dev_desc *dev) { … } static void hci_dma_recycle_ibi_slot(struct i3c_hci *hci, struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) { … } static void hci_dma_process_ibi(struct i3c_hci *hci, struct hci_rh_data *rh) { … } static bool hci_dma_irq_handler(struct i3c_hci *hci, unsigned int mask) { … } const struct hci_io_ops mipi_i3c_hci_dma = …;
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