/* SPDX-License-Identifier: GPL-2.0+ */ /* * Driver for Analog Devices ADV748X video decoder and HDMI receiver * * Copyright (C) 2017 Renesas Electronics Corp. * * Authors: * Koji Matsuoka <[email protected]> * Niklas Söderlund <[email protected]> * Kieran Bingham <[email protected]> * * The ADV748x range of receivers have the following configurations: * * Analog HDMI MHL 4-Lane 1-Lane * In In CSI CSI * ADV7480 X X X * ADV7481 X X X X X * ADV7482 X X X X */ #include <linux/i2c.h> #ifndef _ADV748X_H_ #define _ADV748X_H_ enum adv748x_page { … }; /* * Device tree port number definitions * * The ADV748X ports define the mapping between subdevices * and the device tree specification */ enum adv748x_ports { … }; enum adv748x_csi2_pads { … }; /* CSI2 transmitters can have 2 internal connections, HDMI/AFE */ #define ADV748X_CSI2_MAX_SUBDEVS … struct adv748x_csi2 { … }; #define notifier_to_csi2(n) … #define adv748x_sd_to_csi2(sd) … #define is_tx_enabled(_tx) … #define is_txa(_tx) … #define is_txb(_tx) … #define is_tx(_tx) … #define is_afe_enabled(_state) … #define is_hdmi_enabled(_state) … enum adv748x_hdmi_pads { … }; struct adv748x_hdmi { … }; #define adv748x_ctrl_to_hdmi(ctrl) … #define adv748x_sd_to_hdmi(sd) … enum adv748x_afe_pads { … }; struct adv748x_afe { … }; #define adv748x_ctrl_to_afe(ctrl) … #define adv748x_sd_to_afe(sd) … /** * struct adv748x_state - State of ADV748X * @dev: (OF) device * @client: I2C client * @mutex: protect global state * * @endpoints: parsed device node endpoints for each port * * @i2c_clients: I2C clients for the page accesses * @regmap: regmap configuration pages. * * @hdmi: state of HDMI receiver context * @afe: state of AFE receiver context * @txa: state of TXA transmitter context * @txb: state of TXB transmitter context */ struct adv748x_state { … }; #define adv748x_hdmi_to_state(h) … #define adv748x_afe_to_state(a) … #define adv_err(a, fmt, arg...) … #define adv_info(a, fmt, arg...) … #define adv_dbg(a, fmt, arg...) … /* Register Mappings */ /* IO Map */ #define ADV748X_IO_PD … #define ADV748X_IO_PD_RX_EN … #define ADV748X_IO_REG_01 … #define ADV748X_IO_REG_01_PWRDN_MASK … #define ADV748X_IO_REG_01_PWRDN2B … #define ADV748X_IO_REG_01_PWRDNB … #define ADV748X_IO_REG_04 … #define ADV748X_IO_REG_04_FORCE_FR … #define ADV748X_IO_DATAPATH … #define ADV748X_IO_DATAPATH_VFREQ_M … #define ADV748X_IO_DATAPATH_VFREQ_SHIFT … #define ADV748X_IO_VID_STD … #define ADV748X_IO_10 … #define ADV748X_IO_10_CSI4_EN … #define ADV748X_IO_10_CSI1_EN … #define ADV748X_IO_10_PIX_OUT_EN … #define ADV748X_IO_10_CSI4_IN_SEL_AFE … #define ADV748X_IO_CHIP_REV_ID_1 … #define ADV748X_IO_CHIP_REV_ID_2 … #define ADV748X_IO_REG_F2 … #define ADV748X_IO_REG_F2_READ_AUTO_INC … /* For PAGE slave address offsets */ #define ADV748X_IO_SLAVE_ADDR_BASE … /* * The ADV748x_Recommended_Settings_PrA_2014-08-20.pdf details both 0x80 and * 0xff as examples for performing a software reset. */ #define ADV748X_IO_REG_FF … #define ADV748X_IO_REG_FF_MAIN_RESET … /* HDMI RX Map */ #define ADV748X_HDMI_LW1 … #define ADV748X_HDMI_LW1_VERT_FILTER … #define ADV748X_HDMI_LW1_DE_REGEN … #define ADV748X_HDMI_LW1_WIDTH_MASK … #define ADV748X_HDMI_F0H1 … #define ADV748X_HDMI_F0H1_HEIGHT_MASK … #define ADV748X_HDMI_F1H1 … #define ADV748X_HDMI_F1H1_INTERLACED … #define ADV748X_HDMI_HFRONT_PORCH … #define ADV748X_HDMI_HFRONT_PORCH_MASK … #define ADV748X_HDMI_HSYNC_WIDTH … #define ADV748X_HDMI_HSYNC_WIDTH_MASK … #define ADV748X_HDMI_HBACK_PORCH … #define ADV748X_HDMI_HBACK_PORCH_MASK … #define ADV748X_HDMI_VFRONT_PORCH … #define ADV748X_HDMI_VFRONT_PORCH_MASK … #define ADV748X_HDMI_VSYNC_WIDTH … #define ADV748X_HDMI_VSYNC_WIDTH_MASK … #define ADV748X_HDMI_VBACK_PORCH … #define ADV748X_HDMI_VBACK_PORCH_MASK … #define ADV748X_HDMI_TMDS_1 … #define ADV748X_HDMI_TMDS_2 … /* HDMI RX Repeater Map */ #define ADV748X_REPEATER_EDID_SZ … #define ADV748X_REPEATER_EDID_SZ_SHIFT … #define ADV748X_REPEATER_EDID_CTL … #define ADV748X_REPEATER_EDID_CTL_EN … /* SDP Main Map */ #define ADV748X_SDP_INSEL … #define ADV748X_SDP_VID_SEL … #define ADV748X_SDP_VID_SEL_MASK … #define ADV748X_SDP_VID_SEL_SHIFT … /* Contrast - Unsigned*/ #define ADV748X_SDP_CON … #define ADV748X_SDP_CON_MIN … #define ADV748X_SDP_CON_DEF … #define ADV748X_SDP_CON_MAX … /* Brightness - Signed */ #define ADV748X_SDP_BRI … #define ADV748X_SDP_BRI_MIN … #define ADV748X_SDP_BRI_DEF … #define ADV748X_SDP_BRI_MAX … /* Hue - Signed, inverted*/ #define ADV748X_SDP_HUE … #define ADV748X_SDP_HUE_MIN … #define ADV748X_SDP_HUE_DEF … #define ADV748X_SDP_HUE_MAX … /* Test Patterns / Default Values */ #define ADV748X_SDP_DEF … #define ADV748X_SDP_DEF_VAL_EN … #define ADV748X_SDP_DEF_VAL_AUTO_EN … #define ADV748X_SDP_MAP_SEL … #define ADV748X_SDP_MAP_SEL_RO_MAIN … /* Free run pattern select */ #define ADV748X_SDP_FRP … #define ADV748X_SDP_FRP_MASK … /* Saturation */ #define ADV748X_SDP_SD_SAT_U … #define ADV748X_SDP_SD_SAT_V … #define ADV748X_SDP_SAT_MIN … #define ADV748X_SDP_SAT_DEF … #define ADV748X_SDP_SAT_MAX … /* SDP RO Main Map */ #define ADV748X_SDP_RO_10 … #define ADV748X_SDP_RO_10_IN_LOCK … /* CP Map */ #define ADV748X_CP_PAT_GEN … #define ADV748X_CP_PAT_GEN_EN … /* Contrast Control - Unsigned */ #define ADV748X_CP_CON … #define ADV748X_CP_CON_MIN … #define ADV748X_CP_CON_DEF … #define ADV748X_CP_CON_MAX … /* Saturation Control - Unsigned */ #define ADV748X_CP_SAT … #define ADV748X_CP_SAT_MIN … #define ADV748X_CP_SAT_DEF … #define ADV748X_CP_SAT_MAX … /* Brightness Control - Signed */ #define ADV748X_CP_BRI … #define ADV748X_CP_BRI_MIN … #define ADV748X_CP_BRI_DEF … #define ADV748X_CP_BRI_MAX … /* Hue Control */ #define ADV748X_CP_HUE … #define ADV748X_CP_HUE_MIN … #define ADV748X_CP_HUE_DEF … #define ADV748X_CP_HUE_MAX … #define ADV748X_CP_VID_ADJ … #define ADV748X_CP_VID_ADJ_ENABLE … #define ADV748X_CP_DE_POS_HIGH … #define ADV748X_CP_DE_POS_HIGH_SET … #define ADV748X_CP_DE_POS_END_LOW … #define ADV748X_CP_DE_POS_START_LOW … #define ADV748X_CP_VID_ADJ_2 … #define ADV748X_CP_VID_ADJ_2_INTERLACED … #define ADV748X_CP_VID_ADJ_2_INTERLACED_3D … #define ADV748X_CP_CLMP_POS … #define ADV748X_CP_CLMP_POS_DIS_AUTO … /* CSI : TXA/TXB Maps */ #define ADV748X_CSI_VC_REF … #define ADV748X_CSI_VC_REF_SHIFT … #define ADV748X_CSI_FS_AS_LS … #define ADV748X_CSI_FS_AS_LS_UNKNOWN … /* Register handling */ int adv748x_read(struct adv748x_state *state, u8 addr, u8 reg); int adv748x_write(struct adv748x_state *state, u8 page, u8 reg, u8 value); int adv748x_write_block(struct adv748x_state *state, int client_page, unsigned int init_reg, const void *val, size_t val_len); #define io_read(s, r) … #define io_write(s, r, v) … #define io_clrset(s, r, m, v) … #define hdmi_read(s, r) … #define hdmi_read16(s, r, m) … #define hdmi_write(s, r, v) … #define repeater_read(s, r) … #define repeater_write(s, r, v) … #define sdp_read(s, r) … #define sdp_write(s, r, v) … #define sdp_clrset(s, r, m, v) … #define cp_read(s, r) … #define cp_write(s, r, v) … #define cp_clrset(s, r, m, v) … #define tx_read(t, r) … #define tx_write(t, r, v) … static inline struct v4l2_subdev *adv748x_get_remote_sd(struct media_pad *pad) { … } void adv748x_subdev_init(struct v4l2_subdev *sd, struct adv748x_state *state, const struct v4l2_subdev_ops *ops, u32 function, const char *ident); int adv748x_tx_power(struct adv748x_csi2 *tx, bool on); int adv748x_afe_init(struct adv748x_afe *afe); void adv748x_afe_cleanup(struct adv748x_afe *afe); int adv748x_afe_s_input(struct adv748x_afe *afe, unsigned int input); int adv748x_csi2_init(struct adv748x_state *state, struct adv748x_csi2 *tx); void adv748x_csi2_cleanup(struct adv748x_csi2 *tx); int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx, unsigned int vc); int adv748x_csi2_set_pixelrate(struct v4l2_subdev *sd, s64 rate); int adv748x_hdmi_init(struct adv748x_hdmi *hdmi); void adv748x_hdmi_cleanup(struct adv748x_hdmi *hdmi); #endif /* _ADV748X_H_ */
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