// SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2020 MediaTek Inc. #include <linux/delay.h> #include <linux/i2c.h> #include <linux/module.h> #include <linux/pm_runtime.h> #include <linux/regulator/consumer.h> #include <media/v4l2-async.h> #include <media/v4l2-ctrls.h> #include <media/v4l2-device.h> #include <media/v4l2-fwnode.h> #include <media/v4l2-subdev.h> #define DW9768_NAME … #define DW9768_MAX_FOCUS_POS … /* * This sets the minimum granularity for the focus positions. * A value of 1 gives maximum accuracy for a desired focus position */ #define DW9768_FOCUS_STEPS … /* * Ring control and Power control register * Bit[1] RING_EN * 0: Direct mode * 1: AAC mode (ringing control mode) * Bit[0] PD * 0: Normal operation mode * 1: Power down mode * DW9768 requires waiting time of Topr after PD reset takes place. */ #define DW9768_RING_PD_CONTROL_REG … #define DW9768_PD_MODE_OFF … #define DW9768_PD_MODE_EN … #define DW9768_AAC_MODE_EN … /* * DW9768 separates two registers to control the VCM position. * One for MSB value, another is LSB value. * DAC_MSB: D[9:8] (ADD: 0x03) * DAC_LSB: D[7:0] (ADD: 0x04) * D[9:0] DAC data input: positive output current = D[9:0] / 1023 * 100[mA] */ #define DW9768_MSB_ADDR … #define DW9768_LSB_ADDR … #define DW9768_STATUS_ADDR … /* * AAC mode control & prescale register * Bit[7:5] Namely AC[2:0], decide the VCM mode and operation time. * 001 AAC2 0.48 x Tvib * 010 AAC3 0.70 x Tvib * 011 AAC4 0.75 x Tvib * 101 AAC8 1.13 x Tvib * Bit[2:0] Namely PRESC[2:0], set the internal clock dividing rate as follow. * 000 2 * 001 1 * 010 1/2 * 011 1/4 * 100 8 * 101 4 */ #define DW9768_AAC_PRESC_REG … #define DW9768_AAC_MODE_SEL_MASK … #define DW9768_CLOCK_PRE_SCALE_SEL_MASK … /* * VCM period of vibration register * Bit[5:0] Defined as VCM rising periodic time (Tvib) together with PRESC[2:0] * Tvib = (6.3ms + AACT[5:0] * 0.1ms) * Dividing Rate * Dividing Rate is the internal clock dividing rate that is defined at * PRESCALE register (ADD: 0x06) */ #define DW9768_AAC_TIME_REG … /* * DW9768 requires waiting time (delay time) of t_OPR after power-up, * or in the case of PD reset taking place. */ #define DW9768_T_OPR_US … #define DW9768_TVIB_MS_BASE10 … #define DW9768_AAC_MODE_DEFAULT … #define DW9768_AAC_TIME_DEFAULT … #define DW9768_CLOCK_PRE_SCALE_DEFAULT … /* * This acts as the minimum granularity of lens movement. * Keep this value power of 2, so the control steps can be * uniformly adjusted for gradual lens movement, with desired * number of control steps. */ #define DW9768_MOVE_STEPS … static const char * const dw9768_supply_names[] = …; /* dw9768 device structure */ struct dw9768 { … }; static inline struct dw9768 *sd_to_dw9768(struct v4l2_subdev *subdev) { … } struct dw9768_aac_mode_ot_multi { … }; struct dw9768_clk_presc_dividing_rate { … }; static const struct dw9768_aac_mode_ot_multi aac_mode_ot_multi[] = …; static const struct dw9768_clk_presc_dividing_rate presc_dividing_rate[] = …; static u32 dw9768_find_ot_multi(u32 aac_mode_param) { … } static u32 dw9768_find_dividing_rate(u32 presc_param) { … } /* * DW9768_AAC_PRESC_REG & DW9768_AAC_TIME_REG determine VCM operation time. * For current VCM mode: AAC3, Operation Time would be 0.70 x Tvib. * Tvib = (6.3ms + AACT[5:0] * 0.1MS) * Dividing Rate. * Below is calculation of the operation delay for each step. */ static inline u32 dw9768_cal_move_delay(u32 aac_mode_param, u32 presc_param, u32 aac_timing_param) { … } static int dw9768_mod_reg(struct dw9768 *dw9768, u8 reg, u8 mask, u8 val) { … } static int dw9768_set_dac(struct dw9768 *dw9768, u16 val) { … } static int dw9768_init(struct dw9768 *dw9768) { … } static int dw9768_release(struct dw9768 *dw9768) { … } static int dw9768_runtime_suspend(struct device *dev) { … } static int dw9768_runtime_resume(struct device *dev) { … } static int dw9768_set_ctrl(struct v4l2_ctrl *ctrl) { … } static const struct v4l2_ctrl_ops dw9768_ctrl_ops = …; static int dw9768_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) { … } static int dw9768_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) { … } static const struct v4l2_subdev_internal_ops dw9768_int_ops = …; static const struct v4l2_subdev_ops dw9768_ops = …; static int dw9768_init_controls(struct dw9768 *dw9768) { … } static int dw9768_probe(struct i2c_client *client) { … } static void dw9768_remove(struct i2c_client *client) { … } static const struct of_device_id dw9768_of_table[] = …; MODULE_DEVICE_TABLE(of, dw9768_of_table); static const struct dev_pm_ops dw9768_pm_ops = …; static struct i2c_driver dw9768_i2c_driver = …; module_i2c_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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