// SPDX-License-Identifier: GPL-2.0 /* * A V4L2 driver for Galaxycore GC2145 camera. * Copyright (C) 2023, STMicroelectronics SA * * Inspired by the imx219.c driver * * Datasheet v1.0 available at http://files.pine64.org/doc/datasheet/PinebookPro/GC2145%20CSP%20DataSheet%20release%20V1.0_20131201.pdf */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/gpio/consumer.h> #include <linux/i2c.h> #include <linux/module.h> #include <linux/pm_runtime.h> #include <linux/regulator/consumer.h> #include <linux/units.h> #include <media/mipi-csi2.h> #include <media/v4l2-cci.h> #include <media/v4l2-ctrls.h> #include <media/v4l2-device.h> #include <media/v4l2-event.h> #include <media/v4l2-fwnode.h> #include <media/v4l2-mediabus.h> /* Chip ID */ #define GC2145_CHIP_ID … /* Page 0 */ #define GC2145_REG_EXPOSURE … #define GC2145_REG_HBLANK … #define GC2145_REG_VBLANK … #define GC2145_REG_ROW_START … #define GC2145_REG_COL_START … #define GC2145_REG_WIN_HEIGHT … #define GC2145_REG_WIN_WIDTH … #define GC2145_REG_ANALOG_MODE1 … #define GC2145_REG_OUTPUT_FMT … #define GC2145_REG_SYNC_MODE … #define GC2145_SYNC_MODE_COL_SWITCH … #define GC2145_SYNC_MODE_ROW_SWITCH … #define GC2145_REG_BYPASS_MODE … #define GC2145_BYPASS_MODE_SWITCH … #define GC2145_REG_DEBUG_MODE2 … #define GC2145_REG_DEBUG_MODE3 … #define GC2145_REG_CROP_ENABLE … #define GC2145_REG_CROP_Y … #define GC2145_REG_CROP_X … #define GC2145_REG_CROP_HEIGHT … #define GC2145_REG_CROP_WIDTH … #define GC2145_REG_GLOBAL_GAIN … #define GC2145_REG_CHIP_ID … #define GC2145_REG_PAD_IO … #define GC2145_REG_PAGE_SELECT … /* Page 3 */ #define GC2145_REG_DPHY_ANALOG_MODE1 … #define GC2145_DPHY_MODE_PHY_CLK_EN … #define GC2145_DPHY_MODE_PHY_LANE0_EN … #define GC2145_DPHY_MODE_PHY_LANE1_EN … #define GC2145_DPHY_MODE_PHY_CLK_LANE_P2S_SEL … #define GC2145_REG_DPHY_ANALOG_MODE2 … #define GC2145_DPHY_CLK_DIFF(a) … #define GC2145_DPHY_LANE0_DIFF(a) … #define GC2145_REG_DPHY_ANALOG_MODE3 … #define GC2145_DPHY_LANE1_DIFF(a) … #define GC2145_DPHY_CLK_DELAY … #define GC2145_DPHY_LANE0_DELAY … #define GC2145_DPHY_LANE1_DELAY … #define GC2145_REG_FIFO_FULL_LVL … #define GC2145_REG_FIFO_MODE … #define GC2145_FIFO_MODE_READ_GATE … #define GC2145_FIFO_MODE_MIPI_CLK_MODULE … #define GC2145_REG_BUF_CSI2_MODE … #define GC2145_CSI2_MODE_DOUBLE … #define GC2145_CSI2_MODE_RAW8 … #define GC2145_CSI2_MODE_MIPI_EN … #define GC2145_CSI2_MODE_EN … #define GC2145_REG_MIPI_DT … #define GC2145_REG_LWC … #define GC2145_REG_DPHY_MODE … #define GC2145_DPHY_MODE_TRIGGER_PROG … #define GC2145_REG_FIFO_GATE_MODE … #define GC2145_REG_T_LPX … #define GC2145_REG_T_CLK_HS_PREPARE … #define GC2145_REG_T_CLK_ZERO … #define GC2145_REG_T_CLK_PRE … #define GC2145_REG_T_CLK_POST … #define GC2145_REG_T_CLK_TRAIL … #define GC2145_REG_T_HS_EXIT … #define GC2145_REG_T_WAKEUP … #define GC2145_REG_T_HS_PREPARE … #define GC2145_REG_T_HS_ZERO … #define GC2145_REG_T_HS_TRAIL … /* External clock frequency is 24.0MHz */ #define GC2145_XCLK_FREQ … #define GC2145_NATIVE_WIDTH … #define GC2145_NATIVE_HEIGHT … /** * struct gc2145_mode - GC2145 mode description * @width: frame width (in pixels) * @height: frame height (in pixels) * @reg_seq: registers config sequence to enter into the mode * @reg_seq_size: size of the sequence * @pixel_rate: pixel rate associated with the mode * @crop: window area captured * @hblank: default horizontal blanking * @vblank: default vertical blanking * @link_freq_index: index within the link frequency menu */ struct gc2145_mode { … }; #define GC2145_DEFAULT_EXPOSURE … #define GC2145_DEFAULT_GLOBAL_GAIN … static const struct cci_reg_sequence gc2145_common_regs[] = …; #define GC2145_640_480_PIXELRATE … #define GC2145_640_480_LINKFREQ … #define GC2145_640_480_HBLANK … #define GC2145_640_480_VBLANK … static const struct cci_reg_sequence gc2145_mode_640_480_regs[] = …; #define GC2145_1280_720_PIXELRATE … #define GC2145_1280_720_LINKFREQ … #define GC2145_1280_720_HBLANK … #define GC2145_1280_720_VBLANK … static const struct cci_reg_sequence gc2145_mode_1280_720_regs[] = …; #define GC2145_1600_1200_PIXELRATE … #define GC2145_1600_1200_LINKFREQ … #define GC2145_1600_1200_HBLANK … #define GC2145_1600_1200_VBLANK … static const struct cci_reg_sequence gc2145_mode_1600_1200_regs[] = …; static const s64 gc2145_link_freq_menu[] = …; /* Regulators supplies */ static const char * const gc2145_supply_name[] = …; #define GC2145_NUM_SUPPLIES … /* Mode configs */ #define GC2145_MODE_640X480 … #define GC2145_MODE_1280X720 … #define GC2145_MODE_1600X1200 … static const struct gc2145_mode supported_modes[] = …; /** * struct gc2145_format - GC2145 pixel format description * @code: media bus (MBUS) associated code * @colorspace: V4L2 colorspace * @datatype: MIPI CSI2 data type * @output_fmt: GC2145 output format * @switch_bit: GC2145 first/second switch * @row_col_switch: GC2145 switch row and/or column */ struct gc2145_format { … }; /* All supported formats */ static const struct gc2145_format supported_formats[] = …; struct gc2145_ctrls { … }; struct gc2145 { … }; static inline struct gc2145 *to_gc2145(struct v4l2_subdev *_sd) { … } static inline struct v4l2_subdev *gc2145_ctrl_to_sd(struct v4l2_ctrl *ctrl) { … } static const struct gc2145_format * gc2145_get_format_code(struct gc2145 *gc2145, u32 code) { … } static void gc2145_update_pad_format(struct gc2145 *gc2145, const struct gc2145_mode *mode, struct v4l2_mbus_framefmt *fmt, u32 code, u32 colorspace) { … } static int gc2145_init_state(struct v4l2_subdev *sd, struct v4l2_subdev_state *state) { … } static int gc2145_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_selection *sel) { … } static int gc2145_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_mbus_code_enum *code) { … } static int gc2145_enum_frame_size(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_frame_size_enum *fse) { … } static int gc2145_set_pad_format(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_format *fmt) { … } static const struct cci_reg_sequence gc2145_common_mipi_regs[] = …; static int gc2145_config_mipi_mode(struct gc2145 *gc2145, const struct gc2145_format *gc2145_format) { … } static int gc2145_start_streaming(struct gc2145 *gc2145, struct v4l2_subdev_state *state) { … } static void gc2145_stop_streaming(struct gc2145 *gc2145) { … } static int gc2145_set_stream(struct v4l2_subdev *sd, int enable) { … } /* Power/clock management functions */ static int gc2145_power_on(struct device *dev) { … } static int gc2145_power_off(struct device *dev) { … } static int gc2145_get_regulators(struct gc2145 *gc2145) { … } /* Verify chip ID */ static int gc2145_identify_module(struct gc2145 *gc2145) { … } static const char * const test_pattern_menu[] = …; #define GC2145_TEST_PATTERN_ENABLE … #define GC2145_TEST_PATTERN_UXGA … #define GC2145_TEST_UNIFORM … #define GC2145_TEST_WHITE … #define GC2145_TEST_YELLOW … #define GC2145_TEST_CYAN … #define GC2145_TEST_GREEN … #define GC2145_TEST_MAGENTA … #define GC2145_TEST_RED … #define GC2145_TEST_BLACK … static const u8 test_pattern_val[] = …; static const struct v4l2_subdev_core_ops gc2145_core_ops = …; static const struct v4l2_subdev_video_ops gc2145_video_ops = …; static const struct v4l2_subdev_pad_ops gc2145_pad_ops = …; static const struct v4l2_subdev_ops gc2145_subdev_ops = …; static const struct v4l2_subdev_internal_ops gc2145_subdev_internal_ops = …; static int gc2145_set_ctrl_test_pattern(struct gc2145 *gc2145, int value) { … } static int gc2145_s_ctrl(struct v4l2_ctrl *ctrl) { … } static const struct v4l2_ctrl_ops gc2145_ctrl_ops = …; /* Initialize control handlers */ static int gc2145_init_controls(struct gc2145 *gc2145) { … } static int gc2145_check_hwcfg(struct device *dev) { … } static int gc2145_probe(struct i2c_client *client) { … } static void gc2145_remove(struct i2c_client *client) { … } static const struct of_device_id gc2145_dt_ids[] = …; MODULE_DEVICE_TABLE(of, gc2145_dt_ids); static const struct dev_pm_ops gc2145_pm_ops = …; static struct i2c_driver gc2145_i2c_driver = …; module_i2c_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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