linux/drivers/media/i2c/hi846.c

// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2021 Purism SPC

#include <linux/unaligned.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <linux/pm.h>
#include <linux/property.h>
#include <linux/regulator/consumer.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-fwnode.h>

#define HI846_MEDIA_BUS_FORMAT
#define HI846_RGB_DEPTH

/* Frame length lines / vertical timings */
#define HI846_REG_FLL
#define HI846_FLL_MAX

/* Horizontal timing */
#define HI846_REG_LLP
#define HI846_LINE_LENGTH

#define HI846_REG_BINNING_MODE

#define HI846_REG_IMAGE_ORIENTATION

#define HI846_REG_UNKNOWN_0022

#define HI846_REG_Y_ADDR_START_VACT_H
#define HI846_REG_Y_ADDR_START_VACT_L
#define HI846_REG_UNKNOWN_0028

#define HI846_REG_Y_ADDR_END_VACT_H
#define HI846_REG_Y_ADDR_END_VACT_L

#define HI846_REG_Y_ODD_INC_FOBP
#define HI846_REG_Y_EVEN_INC_FOBP

#define HI846_REG_Y_ODD_INC_VACT
#define HI846_REG_Y_EVEN_INC_VACT

#define HI846_REG_GROUPED_PARA_HOLD

#define HI846_REG_TG_ENABLE

#define HI846_REG_UNKNOWN_005C

#define HI846_REG_UNKNOWN_006A

/*
 * Long exposure time. Actually, exposure is a 20 bit value that
 * includes the lower 4 bits of 0x0073 too. Only 16 bits are used
 * right now
 */
#define HI846_REG_EXPOSURE
#define HI846_EXPOSURE_MIN
#define HI846_EXPOSURE_MAX_MARGIN
#define HI846_EXPOSURE_STEP

/* Analog gain controls from sensor */
#define HI846_REG_ANALOG_GAIN
#define HI846_ANAL_GAIN_MIN
#define HI846_ANAL_GAIN_MAX
#define HI846_ANAL_GAIN_STEP

/* Digital gain controls from sensor */
#define HI846_REG_MWB_GR_GAIN_H
#define HI846_REG_MWB_GR_GAIN_L
#define HI846_REG_MWB_GB_GAIN_H
#define HI846_REG_MWB_GB_GAIN_L
#define HI846_REG_MWB_R_GAIN_H
#define HI846_REG_MWB_R_GAIN_L
#define HI846_REG_MWB_B_GAIN_H
#define HI846_REG_MWB_B_GAIN_L
#define HI846_DGTL_GAIN_MIN
#define HI846_DGTL_GAIN_MAX
#define HI846_DGTL_GAIN_STEP
#define HI846_DGTL_GAIN_DEFAULT

#define HI846_REG_X_ADDR_START_HACT_H
#define HI846_REG_X_ADDR_END_HACT_H

#define HI846_REG_UNKNOWN_012A

#define HI846_REG_UNKNOWN_0200

#define HI846_REG_UNKNOWN_021C
#define HI846_REG_UNKNOWN_021E

#define HI846_REG_UNKNOWN_0402
#define HI846_REG_UNKNOWN_0404
#define HI846_REG_UNKNOWN_0408
#define HI846_REG_UNKNOWN_0410
#define HI846_REG_UNKNOWN_0412
#define HI846_REG_UNKNOWN_0414

#define HI846_REG_UNKNOWN_0418

#define HI846_REG_UNKNOWN_051E

/* Formatter */
#define HI846_REG_X_START_H
#define HI846_REG_X_START_L

/* MIPI */
#define HI846_REG_UNKNOWN_0900
#define HI846_REG_MIPI_TX_OP_EN
#define HI846_REG_MIPI_TX_OP_MODE
#define HI846_RAW8

#define HI846_REG_UNKNOWN_090C
#define HI846_REG_UNKNOWN_090E

#define HI846_REG_UNKNOWN_0914
#define HI846_REG_TLPX
#define HI846_REG_TCLK_PREPARE
#define HI846_REG_TCLK_ZERO
#define HI846_REG_UNKNOWN_0918
#define HI846_REG_THS_PREPARE
#define HI846_REG_THS_ZERO
#define HI846_REG_THS_TRAIL
#define HI846_REG_TCLK_POST
#define HI846_REG_TCLK_TRAIL_MIN
#define HI846_REG_UNKNOWN_091E

#define HI846_REG_UNKNOWN_0954
#define HI846_REG_UNKNOWN_0956
#define HI846_REG_UNKNOWN_0958
#define HI846_REG_UNKNOWN_095A

/* ISP Common */
#define HI846_REG_MODE_SELECT
#define HI846_MODE_STANDBY
#define HI846_MODE_STREAMING
#define HI846_REG_FAST_STANDBY_MODE
#define HI846_REG_ISP_EN_H

/* Test Pattern Control */
#define HI846_REG_ISP
#define HI846_REG_ISP_TPG_EN
#define HI846_REG_TEST_PATTERN

#define HI846_REG_UNKNOWN_0A0C

/* Windowing */
#define HI846_REG_X_OUTPUT_SIZE_H
#define HI846_REG_X_OUTPUT_SIZE_L
#define HI846_REG_Y_OUTPUT_SIZE_H
#define HI846_REG_Y_OUTPUT_SIZE_L

/* ISP Common */
#define HI846_REG_PEDESTAL_EN

#define HI846_REG_UNKNOWN_0A1E

/* Horizontal Binning Mode */
#define HI846_REG_HBIN_MODE

#define HI846_REG_UNKNOWN_0A24
#define HI846_REG_UNKNOWN_0B02
#define HI846_REG_UNKNOWN_0B10
#define HI846_REG_UNKNOWN_0B12
#define HI846_REG_UNKNOWN_0B14

/* BLC (Black Level Calibration) */
#define HI846_REG_BLC_CTL0

#define HI846_REG_UNKNOWN_0C06
#define HI846_REG_UNKNOWN_0C10
#define HI846_REG_UNKNOWN_0C12
#define HI846_REG_UNKNOWN_0C14
#define HI846_REG_UNKNOWN_0C16

#define HI846_REG_UNKNOWN_0E04

#define HI846_REG_CHIP_ID_L
#define HI846_REG_CHIP_ID_H
#define HI846_CHIP_ID_L
#define HI846_CHIP_ID_H

#define HI846_REG_UNKNOWN_0F04
#define HI846_REG_UNKNOWN_0F08

/* PLL */
#define HI846_REG_PLL_CFG_MIPI2_H
#define HI846_REG_PLL_CFG_MIPI2_L

#define HI846_REG_UNKNOWN_0F30
#define HI846_REG_PLL_CFG_RAMP1_H
#define HI846_REG_UNKNOWN_0F36
#define HI846_REG_PLL_CFG_MIPI1_H

#define HI846_REG_UNKNOWN_2008
#define HI846_REG_UNKNOWN_326E

struct hi846_reg {};

struct hi846_reg_list {};

struct hi846_mode {};

static const struct hi846_reg hi846_init_2lane[] =;

static const struct hi846_reg hi846_init_4lane[] =;

static const struct hi846_reg mode_640x480_config[] =;

static const struct hi846_reg mode_640x480_mipi_2lane[] =;

static const struct hi846_reg mode_1280x720_config[] =;

static const struct hi846_reg mode_1280x720_mipi_2lane[] =;

static const struct hi846_reg mode_1280x720_mipi_4lane[] =;

static const struct hi846_reg mode_1632x1224_config[] =;

static const struct hi846_reg mode_1632x1224_mipi_2lane[] =;

static const struct hi846_reg mode_1632x1224_mipi_4lane[] =;

static const char * const hi846_test_pattern_menu[] =;

#define FREQ_INDEX_640
#define FREQ_INDEX_1280
static const s64 hi846_link_freqs[] =;

static const struct hi846_reg_list hi846_init_regs_list_2lane =;

static const struct hi846_reg_list hi846_init_regs_list_4lane =;

static const struct hi846_mode supported_modes[] =;

struct hi846_datafmt {};

static const char * const hi846_supply_names[] =;

#define HI846_NUM_SUPPLIES

struct hi846 {};

static inline struct hi846 *to_hi846(struct v4l2_subdev *sd)
{}

static const struct hi846_datafmt hi846_colour_fmts[] =;

static const struct hi846_datafmt *hi846_find_datafmt(u32 code)
{}

static inline u8 hi846_get_link_freq_index(struct hi846 *hi846)
{}

static u64 hi846_get_link_freq(struct hi846 *hi846)
{}

static u64 hi846_calc_pixel_rate(struct hi846 *hi846)
{}

static int hi846_read_reg(struct hi846 *hi846, u16 reg, u8 *val)
{}

static int hi846_write_reg(struct hi846 *hi846, u16 reg, u8 val)
{}

static void hi846_write_reg_16(struct hi846 *hi846, u16 reg, u16 val, int *err)
{}

static int hi846_write_reg_list(struct hi846 *hi846,
				const struct hi846_reg_list *r_list)
{}

static int hi846_update_digital_gain(struct hi846 *hi846, u16 d_gain)
{}

static int hi846_test_pattern(struct hi846 *hi846, u32 pattern)
{}

static int hi846_set_ctrl(struct v4l2_ctrl *ctrl)
{}

static const struct v4l2_ctrl_ops hi846_ctrl_ops =;

static int hi846_init_controls(struct hi846 *hi846)
{}

static int hi846_set_video_mode(struct hi846 *hi846, int fps)
{}

static int hi846_start_streaming(struct hi846 *hi846)
{}

static void hi846_stop_streaming(struct hi846 *hi846)
{}

static int hi846_set_stream(struct v4l2_subdev *sd, int enable)
{}

static int hi846_power_on(struct hi846 *hi846)
{}

static int hi846_power_off(struct hi846 *hi846)
{}

static int __maybe_unused hi846_suspend(struct device *dev)
{}

static int __maybe_unused hi846_resume(struct device *dev)
{}

static int hi846_set_format(struct v4l2_subdev *sd,
			    struct v4l2_subdev_state *sd_state,
			    struct v4l2_subdev_format *format)
{}

static int hi846_get_format(struct v4l2_subdev *sd,
			    struct v4l2_subdev_state *sd_state,
			    struct v4l2_subdev_format *format)
{}

static int hi846_enum_mbus_code(struct v4l2_subdev *sd,
				struct v4l2_subdev_state *sd_state,
				struct v4l2_subdev_mbus_code_enum *code)
{}

static int hi846_enum_frame_size(struct v4l2_subdev *sd,
				 struct v4l2_subdev_state *sd_state,
				 struct v4l2_subdev_frame_size_enum *fse)
{}

static int hi846_get_selection(struct v4l2_subdev *sd,
			       struct v4l2_subdev_state *sd_state,
			       struct v4l2_subdev_selection *sel)
{}

static int hi846_init_state(struct v4l2_subdev *sd,
			    struct v4l2_subdev_state *sd_state)
{}

static const struct v4l2_subdev_video_ops hi846_video_ops =;

static const struct v4l2_subdev_pad_ops hi846_pad_ops =;

static const struct v4l2_subdev_ops hi846_subdev_ops =;

static const struct v4l2_subdev_internal_ops hi846_internal_ops =;

static const struct media_entity_operations hi846_subdev_entity_ops =;

static int hi846_identify_module(struct hi846 *hi846)
{}

static s64 hi846_check_link_freqs(struct hi846 *hi846,
				  struct v4l2_fwnode_endpoint *ep)
{}

static int hi846_parse_dt(struct hi846 *hi846, struct device *dev)
{}

static int hi846_probe(struct i2c_client *client)
{}

static void hi846_remove(struct i2c_client *client)
{}

static const struct dev_pm_ops hi846_pm_ops =;

static const struct of_device_id hi846_of_match[] =;
MODULE_DEVICE_TABLE(of, hi846_of_match);

static struct i2c_driver hi846_i2c_driver =;

module_i2c_driver();

MODULE_AUTHOR();
MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();