linux/drivers/media/i2c/ar0521.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2021 Sieć Badawcza Łukasiewicz
 * - Przemysłowy Instytut Automatyki i Pomiarów PIAP
 * Written by Krzysztof Hałasa
 */

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/pm_runtime.h>

#include <media/v4l2-ctrls.h>
#include <media/v4l2-fwnode.h>
#include <media/v4l2-subdev.h>

/* External clock (extclk) frequencies */
#define AR0521_EXTCLK_MIN
#define AR0521_EXTCLK_MAX

/* PLL and PLL2 */
#define AR0521_PLL_MIN
#define AR0521_PLL_MAX

/* Effective pixel sample rate on the pixel array. */
#define AR0521_PIXEL_CLOCK_RATE
#define AR0521_PIXEL_CLOCK_MIN
#define AR0521_PIXEL_CLOCK_MAX

#define AR0521_NATIVE_WIDTH
#define AR0521_NATIVE_HEIGHT
#define AR0521_MIN_X_ADDR_START
#define AR0521_MIN_Y_ADDR_START
#define AR0521_MAX_X_ADDR_END
#define AR0521_MAX_Y_ADDR_END

#define AR0521_WIDTH_MIN
#define AR0521_WIDTH_MAX
#define AR0521_HEIGHT_MIN
#define AR0521_HEIGHT_MAX

#define AR0521_WIDTH_BLANKING_MIN
#define AR0521_HEIGHT_BLANKING_MIN
#define AR0521_TOTAL_HEIGHT_MAX
#define AR0521_TOTAL_WIDTH_MAX

#define AR0521_ANA_GAIN_MIN
#define AR0521_ANA_GAIN_MAX
#define AR0521_ANA_GAIN_STEP
#define AR0521_ANA_GAIN_DEFAULT

/* AR0521 registers */
#define AR0521_REG_VT_PIX_CLK_DIV
#define AR0521_REG_FRAME_LENGTH_LINES

#define AR0521_REG_CHIP_ID
#define AR0521_REG_COARSE_INTEGRATION_TIME
#define AR0521_REG_ROW_SPEED
#define AR0521_REG_EXTRA_DELAY
#define AR0521_REG_RESET
#define AR0521_REG_RESET_DEFAULTS
#define AR0521_REG_RESET_GROUP_PARAM_HOLD
#define AR0521_REG_RESET_STREAM
#define AR0521_REG_RESET_RESTART
#define AR0521_REG_RESET_INIT

#define AR0521_REG_ANA_GAIN_CODE_GLOBAL

#define AR0521_REG_GREEN1_GAIN
#define AR0521_REG_BLUE_GAIN
#define AR0521_REG_RED_GAIN
#define AR0521_REG_GREEN2_GAIN
#define AR0521_REG_GLOBAL_GAIN

#define AR0521_REG_HISPI_TEST_MODE
#define AR0521_REG_HISPI_TEST_MODE_LP11

#define AR0521_REG_TEST_PATTERN_MODE

#define AR0521_REG_SERIAL_FORMAT
#define AR0521_REG_SERIAL_FORMAT_MIPI

#define AR0521_REG_HISPI_CONTROL_STATUS
#define AR0521_REG_HISPI_CONTROL_STATUS_FRAMER_TEST_MODE_ENABLE

#define be

static const char * const ar0521_supply_names[] =;

static const s64 ar0521_link_frequencies[] =;

struct ar0521_ctrls {};

struct ar0521_dev {};

static inline struct ar0521_dev *to_ar0521_dev(struct v4l2_subdev *sd)
{}

static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
{}

static u32 div64_round(u64 v, u32 d)
{}

static u32 div64_round_up(u64 v, u32 d)
{}

static int ar0521_code_to_bpp(struct ar0521_dev *sensor)
{}

/* Data must be BE16, the first value is the register address */
static int ar0521_write_regs(struct ar0521_dev *sensor, const __be16 *data,
			     unsigned int count)
{}

static int ar0521_write_reg(struct ar0521_dev *sensor, u16 reg, u16 val)
{}

static int ar0521_set_geometry(struct ar0521_dev *sensor)
{}

static int ar0521_set_gains(struct ar0521_dev *sensor)
{}

static u32 calc_pll(struct ar0521_dev *sensor, u32 freq, u16 *pre_ptr, u16 *mult_ptr)
{}

static void ar0521_calc_pll(struct ar0521_dev *sensor)
{}

static int ar0521_pll_config(struct ar0521_dev *sensor)
{}

static int ar0521_set_stream(struct ar0521_dev *sensor, bool on)
{}

static void ar0521_adj_fmt(struct v4l2_mbus_framefmt *fmt)
{}

static int ar0521_get_fmt(struct v4l2_subdev *sd,
			  struct v4l2_subdev_state *sd_state,
			  struct v4l2_subdev_format *format)
{}

static int ar0521_set_fmt(struct v4l2_subdev *sd,
			  struct v4l2_subdev_state *sd_state,
			  struct v4l2_subdev_format *format)
{}

static int ar0521_s_ctrl(struct v4l2_ctrl *ctrl)
{}

static const struct v4l2_ctrl_ops ar0521_ctrl_ops =;

static const char * const test_pattern_menu[] =;

static int ar0521_init_controls(struct ar0521_dev *sensor)
{}

#define REGS_ENTRY(a)
#define REGS(...)

static const struct initial_reg {} initial_regs[] =;

static void __ar0521_power_off(struct device *dev)
{}

static int ar0521_power_off(struct device *dev)
{}

static int ar0521_power_on(struct device *dev)
{}

static int ar0521_enum_mbus_code(struct v4l2_subdev *sd,
				 struct v4l2_subdev_state *sd_state,
				 struct v4l2_subdev_mbus_code_enum *code)
{}

static int ar0521_enum_frame_size(struct v4l2_subdev *sd,
				  struct v4l2_subdev_state *sd_state,
				  struct v4l2_subdev_frame_size_enum *fse)
{}

static int ar0521_pre_streamon(struct v4l2_subdev *sd, u32 flags)
{}

static int ar0521_post_streamoff(struct v4l2_subdev *sd)
{}

static int ar0521_s_stream(struct v4l2_subdev *sd, int enable)
{}

static const struct v4l2_subdev_core_ops ar0521_core_ops =;

static const struct v4l2_subdev_video_ops ar0521_video_ops =;

static const struct v4l2_subdev_pad_ops ar0521_pad_ops =;

static const struct v4l2_subdev_ops ar0521_subdev_ops =;

static int ar0521_probe(struct i2c_client *client)
{}

static void ar0521_remove(struct i2c_client *client)
{}

static const struct dev_pm_ops ar0521_pm_ops =;
static const struct of_device_id ar0521_dt_ids[] =;
MODULE_DEVICE_TABLE(of, ar0521_dt_ids);

static struct i2c_driver ar0521_i2c_driver =;

module_i2c_driver();

MODULE_DESCRIPTION();
MODULE_AUTHOR();
MODULE_LICENSE();