linux/drivers/media/i2c/ml86v7667.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * OKI Semiconductor ML86V7667 video decoder driver
 *
 * Author: Vladimir Barinov <[email protected]>
 * Copyright (C) 2013 Cogent Embedded, Inc.
 * Copyright (C) 2013 Renesas Solutions Corp.
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/videodev2.h>
#include <media/v4l2-subdev.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-ctrls.h>

#define DRV_NAME

/* Subaddresses */
#define MRA_REG
#define MRC_REG
#define LUMC_REG
#define CLC_REG
#define SSEPL_REG
#define CHRCA_REG
#define ACCC_REG
#define ACCRC_REG
#define HUE_REG
#define ADC2_REG
#define PLLR1_REG
#define STATUS_REG

/* Mode Register A register bits */
#define MRA_OUTPUT_MODE_MASK
#define MRA_ITUR_BT601
#define MRA_ITUR_BT656
#define MRA_INPUT_MODE_MASK
#define MRA_PAL_BT601
#define MRA_NTSC_BT601
#define MRA_REGISTER_MODE

/* Mode Register C register bits */
#define MRC_AUTOSELECT

/* Luminance Control register bits */
#define LUMC_ONOFF_SHIFT
#define LUMC_ONOFF_MASK

/* Contrast level control register bits */
#define CLC_CONTRAST_ONOFF
#define CLC_CONTRAST_MASK

/* Sync separation level register bits */
#define SSEPL_LUMINANCE_ONOFF
#define SSEPL_LUMINANCE_MASK

/* Chrominance Control A register bits */
#define CHRCA_MODE_SHIFT
#define CHRCA_MODE_MASK

/* ACC Loop filter & Chrominance control register bits */
#define ACCC_CHROMA_CR_SHIFT
#define ACCC_CHROMA_CR_MASK
#define ACCC_CHROMA_CB_SHIFT
#define ACCC_CHROMA_CB_MASK

/* ACC Reference level control register bits */
#define ACCRC_CHROMA_MASK
#define ACCRC_CHROMA_SHIFT

/* ADC Register 2 register bits */
#define ADC2_CLAMP_VOLTAGE_MASK
#define ADC2_CLAMP_VOLTAGE(n)

/* PLL Register 1 register bits */
#define PLLR1_FIXED_CLOCK

/* STATUS Register register bits */
#define STATUS_HLOCK_DETECT
#define STATUS_NTSCPAL

struct ml86v7667_priv {};

static inline struct ml86v7667_priv *to_ml86v7667(struct v4l2_subdev *subdev)
{}

static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
{}

static int ml86v7667_mask_set(struct i2c_client *client, const u8 reg,
			      const u8 mask, const u8 data)
{}

static int ml86v7667_s_ctrl(struct v4l2_ctrl *ctrl)
{}

static int ml86v7667_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
{}

static int ml86v7667_g_input_status(struct v4l2_subdev *sd, u32 *status)
{}

static int ml86v7667_enum_mbus_code(struct v4l2_subdev *sd,
		struct v4l2_subdev_state *sd_state,
		struct v4l2_subdev_mbus_code_enum *code)
{}

static int ml86v7667_fill_fmt(struct v4l2_subdev *sd,
		struct v4l2_subdev_state *sd_state,
		struct v4l2_subdev_format *format)
{}

static int ml86v7667_get_mbus_config(struct v4l2_subdev *sd,
				     unsigned int pad,
				     struct v4l2_mbus_config *cfg)
{}

static int ml86v7667_g_std(struct v4l2_subdev *sd, v4l2_std_id *std)
{}

static int ml86v7667_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
{}

#ifdef CONFIG_VIDEO_ADV_DEBUG
static int ml86v7667_g_register(struct v4l2_subdev *sd,
				struct v4l2_dbg_register *reg)
{}

static int ml86v7667_s_register(struct v4l2_subdev *sd,
				const struct v4l2_dbg_register *reg)
{}
#endif

static const struct v4l2_ctrl_ops ml86v7667_ctrl_ops =;

static const struct v4l2_subdev_video_ops ml86v7667_subdev_video_ops =;

static const struct v4l2_subdev_pad_ops ml86v7667_subdev_pad_ops =;

static const struct v4l2_subdev_core_ops ml86v7667_subdev_core_ops =;

static const struct v4l2_subdev_ops ml86v7667_subdev_ops =;

static int ml86v7667_init(struct ml86v7667_priv *priv)
{}

static int ml86v7667_probe(struct i2c_client *client)
{}

static void ml86v7667_remove(struct i2c_client *client)
{}

static const struct i2c_device_id ml86v7667_id[] =;
MODULE_DEVICE_TABLE(i2c, ml86v7667_id);

static struct i2c_driver ml86v7667_i2c_driver =;

module_i2c_driver();

MODULE_DESCRIPTION();
MODULE_AUTHOR();
MODULE_LICENSE();