// SPDX-License-Identifier: GPL-2.0 /* * V4L2 sensor driver for Aptina MT9V111 image sensor * Copyright (C) 2018 Jacopo Mondi <[email protected]> * * Based on mt9v032 driver * Copyright (C) 2010, Laurent Pinchart <[email protected]> * Copyright (C) 2008, Guennadi Liakhovetski <[email protected]> * * Based on mt9v011 driver * Copyright (c) 2009 Mauro Carvalho Chehab <[email protected]> */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/gpio/consumer.h> #include <linux/i2c.h> #include <linux/of.h> #include <linux/slab.h> #include <linux/videodev2.h> #include <linux/v4l2-mediabus.h> #include <linux/module.h> #include <media/v4l2-ctrls.h> #include <media/v4l2-device.h> #include <media/v4l2-fwnode.h> #include <media/v4l2-image-sizes.h> #include <media/v4l2-subdev.h> /* * MT9V111 is a 1/4-Inch CMOS digital image sensor with an integrated * Image Flow Processing (IFP) engine and a sensor core loosely based on * MT9V011. * * The IFP can produce several output image formats from the sensor core * output. This driver currently supports only YUYV format permutations. * * The driver allows manual frame rate control through set_frame_interval subdev * operation or V4L2_CID_V/HBLANK controls, but it is known that the * auto-exposure algorithm might modify the programmed frame rate. While the * driver initially programs the sensor with auto-exposure and * auto-white-balancing enabled, it is possible to disable them and more * precisely control the frame rate. * * While it seems possible to instruct the auto-exposure control algorithm to * respect a programmed frame rate when adjusting the pixel integration time, * registers controlling this feature are not documented in the public * available sensor manual used to develop this driver (09005aef80e90084, * MT9V111_1.fm - Rev. G 1/05 EN). */ #define MT9V111_CHIP_ID_HIGH … #define MT9V111_CHIP_ID_LOW … #define MT9V111_R01_ADDR_SPACE … #define MT9V111_R01_IFP … #define MT9V111_R01_CORE … #define MT9V111_IFP_R06_OPMODE_CTRL … #define MT9V111_IFP_R06_OPMODE_CTRL_AWB_EN … #define MT9V111_IFP_R06_OPMODE_CTRL_AE_EN … #define MT9V111_IFP_R07_IFP_RESET … #define MT9V111_IFP_R07_IFP_RESET_MASK … #define MT9V111_IFP_R08_OUTFMT_CTRL … #define MT9V111_IFP_R08_OUTFMT_CTRL_FLICKER … #define MT9V111_IFP_R08_OUTFMT_CTRL_PCLK … #define MT9V111_IFP_R3A_OUTFMT_CTRL2 … #define MT9V111_IFP_R3A_OUTFMT_CTRL2_SWAP_CBCR … #define MT9V111_IFP_R3A_OUTFMT_CTRL2_SWAP_YC … #define MT9V111_IFP_R3A_OUTFMT_CTRL2_SWAP_MASK … #define MT9V111_IFP_RA5_HPAN … #define MT9V111_IFP_RA6_HZOOM … #define MT9V111_IFP_RA7_HOUT … #define MT9V111_IFP_RA8_VPAN … #define MT9V111_IFP_RA9_VZOOM … #define MT9V111_IFP_RAA_VOUT … #define MT9V111_IFP_DECIMATION_MASK … #define MT9V111_IFP_DECIMATION_FREEZE … #define MT9V111_CORE_R03_WIN_HEIGHT … #define MT9V111_CORE_R03_WIN_V_OFFS … #define MT9V111_CORE_R04_WIN_WIDTH … #define MT9V111_CORE_R04_WIN_H_OFFS … #define MT9V111_CORE_R05_HBLANK … #define MT9V111_CORE_R05_MIN_HBLANK … #define MT9V111_CORE_R05_MAX_HBLANK … #define MT9V111_CORE_R05_DEF_HBLANK … #define MT9V111_CORE_R06_VBLANK … #define MT9V111_CORE_R06_MIN_VBLANK … #define MT9V111_CORE_R06_MAX_VBLANK … #define MT9V111_CORE_R06_DEF_VBLANK … #define MT9V111_CORE_R07_OUT_CTRL … #define MT9V111_CORE_R07_OUT_CTRL_SAMPLE … #define MT9V111_CORE_R09_PIXEL_INT … #define MT9V111_CORE_R09_PIXEL_INT_MASK … #define MT9V111_CORE_R0D_CORE_RESET … #define MT9V111_CORE_R0D_CORE_RESET_MASK … #define MT9V111_CORE_RFF_CHIP_VER … #define MT9V111_PIXEL_ARRAY_WIDTH … #define MT9V111_PIXEL_ARRAY_HEIGHT … #define MT9V111_MAX_CLKIN … /* The default sensor configuration at startup time. */ static const struct v4l2_mbus_framefmt mt9v111_def_fmt = …; struct mt9v111_dev { … }; #define sd_to_mt9v111(__sd) … /* * mt9v111_mbus_fmt - List all media bus formats supported by the driver. * * Only list the media bus code here. The image sizes are freely configurable * in the pixel array sizes range. * * The desired frame interval, in the supported frame interval range, is * obtained by configuring blanking as the sensor does not have a PLL but * only a fixed clock divider that generates the output pixel clock. */ static struct mt9v111_mbus_fmt { … } mt9v111_formats[] = …; static u32 mt9v111_frame_intervals[] = …; /* * mt9v111_frame_sizes - List sensor's supported resolutions. * * Resolution generated through decimation in the IFP block from the * full VGA pixel array. */ static struct v4l2_rect mt9v111_frame_sizes[] = …; /* --- Device I/O access --- */ static int __mt9v111_read(struct i2c_client *c, u8 reg, u16 *val) { … } static int __mt9v111_write(struct i2c_client *c, u8 reg, u16 val) { … } static int __mt9v111_addr_space_select(struct i2c_client *c, u16 addr_space) { … } static int mt9v111_read(struct i2c_client *c, u8 addr_space, u8 reg, u16 *val) { … } static int mt9v111_write(struct i2c_client *c, u8 addr_space, u8 reg, u16 val) { … } static int mt9v111_update(struct i2c_client *c, u8 addr_space, u8 reg, u16 mask, u16 val) { … } /* --- Sensor HW operations --- */ static int __mt9v111_power_on(struct v4l2_subdev *sd) { … } static int __mt9v111_power_off(struct v4l2_subdev *sd) { … } static int __mt9v111_hw_reset(struct mt9v111_dev *mt9v111) { … } static int __mt9v111_sw_reset(struct mt9v111_dev *mt9v111) { … } static int mt9v111_calc_frame_rate(struct mt9v111_dev *mt9v111, struct v4l2_fract *tpf) { … } static int mt9v111_hw_config(struct mt9v111_dev *mt9v111) { … } /* --- V4L2 subdev operations --- */ static int mt9v111_s_power(struct v4l2_subdev *sd, int on) { … } static int mt9v111_s_stream(struct v4l2_subdev *subdev, int enable) { … } static int mt9v111_set_frame_interval(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_frame_interval *ival) { … } static int mt9v111_get_frame_interval(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_frame_interval *ival) { … } static struct v4l2_mbus_framefmt *__mt9v111_get_pad_format( struct mt9v111_dev *mt9v111, struct v4l2_subdev_state *sd_state, unsigned int pad, enum v4l2_subdev_format_whence which) { … } static int mt9v111_enum_mbus_code(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_mbus_code_enum *code) { … } static int mt9v111_enum_frame_interval(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_frame_interval_enum *fie) { … } static int mt9v111_enum_frame_size(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_frame_size_enum *fse) { … } static int mt9v111_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_format *format) { … } static int mt9v111_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_format *format) { … } static int mt9v111_init_state(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state) { … } static const struct v4l2_subdev_core_ops mt9v111_core_ops = …; static const struct v4l2_subdev_video_ops mt9v111_video_ops = …; static const struct v4l2_subdev_pad_ops mt9v111_pad_ops = …; static const struct v4l2_subdev_ops mt9v111_ops = …; static const struct v4l2_subdev_internal_ops mt9v111_internal_ops = …; static const struct media_entity_operations mt9v111_subdev_entity_ops = …; /* --- V4L2 ctrl --- */ static int mt9v111_s_ctrl(struct v4l2_ctrl *ctrl) { … } static const struct v4l2_ctrl_ops mt9v111_ctrl_ops = …; static int mt9v111_chip_probe(struct mt9v111_dev *mt9v111) { … } static int mt9v111_probe(struct i2c_client *client) { … } static void mt9v111_remove(struct i2c_client *client) { … } static const struct of_device_id mt9v111_of_match[] = …; MODULE_DEVICE_TABLE(of, mt9v111_of_match); static struct i2c_driver mt9v111_driver = …; module_i2c_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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