// SPDX-License-Identifier: GPL-2.0-only /* * Driver for MT9P031 CMOS Image Sensor from Aptina * * Copyright (C) 2011, Laurent Pinchart <[email protected]> * Copyright (C) 2011, Javier Martin <[email protected]> * Copyright (C) 2011, Guennadi Liakhovetski <[email protected]> * * Based on the MT9V032 driver and Bastian Hecht's code. */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/device.h> #include <linux/gpio/consumer.h> #include <linux/i2c.h> #include <linux/log2.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_graph.h> #include <linux/pm.h> #include <linux/regulator/consumer.h> #include <linux/slab.h> #include <linux/videodev2.h> #include <media/i2c/mt9p031.h> #include <media/v4l2-async.h> #include <media/v4l2-ctrls.h> #include <media/v4l2-device.h> #include <media/v4l2-fwnode.h> #include <media/v4l2-subdev.h> #include "aptina-pll.h" #define MT9P031_PIXEL_ARRAY_WIDTH … #define MT9P031_PIXEL_ARRAY_HEIGHT … #define MT9P031_CHIP_VERSION … #define MT9P031_CHIP_VERSION_VALUE … #define MT9P031_ROW_START … #define MT9P031_ROW_START_MIN … #define MT9P031_ROW_START_MAX … #define MT9P031_ROW_START_DEF … #define MT9P031_COLUMN_START … #define MT9P031_COLUMN_START_MIN … #define MT9P031_COLUMN_START_MAX … #define MT9P031_COLUMN_START_DEF … #define MT9P031_WINDOW_HEIGHT … #define MT9P031_WINDOW_HEIGHT_MIN … #define MT9P031_WINDOW_HEIGHT_MAX … #define MT9P031_WINDOW_HEIGHT_DEF … #define MT9P031_WINDOW_WIDTH … #define MT9P031_WINDOW_WIDTH_MIN … #define MT9P031_WINDOW_WIDTH_MAX … #define MT9P031_WINDOW_WIDTH_DEF … #define MT9P031_HORIZONTAL_BLANK … #define MT9P031_HORIZONTAL_BLANK_MIN … #define MT9P031_HORIZONTAL_BLANK_MAX … #define MT9P031_VERTICAL_BLANK … #define MT9P031_VERTICAL_BLANK_MIN … #define MT9P031_VERTICAL_BLANK_MAX … #define MT9P031_VERTICAL_BLANK_DEF … #define MT9P031_OUTPUT_CONTROL … #define MT9P031_OUTPUT_CONTROL_CEN … #define MT9P031_OUTPUT_CONTROL_SYN … #define MT9P031_OUTPUT_CONTROL_DEF … #define MT9P031_SHUTTER_WIDTH_UPPER … #define MT9P031_SHUTTER_WIDTH_LOWER … #define MT9P031_SHUTTER_WIDTH_MIN … #define MT9P031_SHUTTER_WIDTH_MAX … #define MT9P031_SHUTTER_WIDTH_DEF … #define MT9P031_PLL_CONTROL … #define MT9P031_PLL_CONTROL_PWROFF … #define MT9P031_PLL_CONTROL_PWRON … #define MT9P031_PLL_CONTROL_USEPLL … #define MT9P031_PLL_CONFIG_1 … #define MT9P031_PLL_CONFIG_2 … #define MT9P031_PIXEL_CLOCK_CONTROL … #define MT9P031_PIXEL_CLOCK_INVERT … #define MT9P031_PIXEL_CLOCK_SHIFT(n) … #define MT9P031_PIXEL_CLOCK_DIVIDE(n) … #define MT9P031_RESTART … #define MT9P031_FRAME_PAUSE_RESTART … #define MT9P031_FRAME_RESTART … #define MT9P031_SHUTTER_DELAY … #define MT9P031_RST … #define MT9P031_RST_ENABLE … #define MT9P031_READ_MODE_1 … #define MT9P031_READ_MODE_2 … #define MT9P031_READ_MODE_2_ROW_MIR … #define MT9P031_READ_MODE_2_COL_MIR … #define MT9P031_READ_MODE_2_ROW_BLC … #define MT9P031_ROW_ADDRESS_MODE … #define MT9P031_COLUMN_ADDRESS_MODE … #define MT9P031_GLOBAL_GAIN … #define MT9P031_GLOBAL_GAIN_MIN … #define MT9P031_GLOBAL_GAIN_MAX … #define MT9P031_GLOBAL_GAIN_DEF … #define MT9P031_GLOBAL_GAIN_MULT … #define MT9P031_ROW_BLACK_TARGET … #define MT9P031_ROW_BLACK_DEF_OFFSET … #define MT9P031_GREEN1_OFFSET … #define MT9P031_GREEN2_OFFSET … #define MT9P031_BLACK_LEVEL_CALIBRATION … #define MT9P031_BLC_MANUAL_BLC … #define MT9P031_RED_OFFSET … #define MT9P031_BLUE_OFFSET … #define MT9P031_TEST_PATTERN … #define MT9P031_TEST_PATTERN_SHIFT … #define MT9P031_TEST_PATTERN_ENABLE … #define MT9P031_TEST_PATTERN_GREEN … #define MT9P031_TEST_PATTERN_RED … #define MT9P031_TEST_PATTERN_BLUE … struct mt9p031 { … }; static struct mt9p031 *to_mt9p031(struct v4l2_subdev *sd) { … } static int mt9p031_read(struct i2c_client *client, u8 reg) { … } static int mt9p031_write(struct i2c_client *client, u8 reg, u16 data) { … } static int mt9p031_set_output_control(struct mt9p031 *mt9p031, u16 clear, u16 set) { … } static int mt9p031_set_mode2(struct mt9p031 *mt9p031, u16 clear, u16 set) { … } static int mt9p031_reset(struct mt9p031 *mt9p031) { … } static int mt9p031_clk_setup(struct mt9p031 *mt9p031) { … } static int mt9p031_pll_enable(struct mt9p031 *mt9p031) { … } static inline int mt9p031_pll_disable(struct mt9p031 *mt9p031) { … } static int mt9p031_power_on(struct mt9p031 *mt9p031) { … } static void mt9p031_power_off(struct mt9p031 *mt9p031) { … } static int __mt9p031_set_power(struct mt9p031 *mt9p031, bool on) { … } /* ----------------------------------------------------------------------------- * V4L2 subdev video operations */ static int mt9p031_set_params(struct mt9p031 *mt9p031) { … } static int mt9p031_s_stream(struct v4l2_subdev *subdev, int enable) { … } static int mt9p031_enum_mbus_code(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_mbus_code_enum *code) { … } static int mt9p031_enum_frame_size(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_frame_size_enum *fse) { … } static struct v4l2_mbus_framefmt * __mt9p031_get_pad_format(struct mt9p031 *mt9p031, struct v4l2_subdev_state *sd_state, unsigned int pad, u32 which) { … } static struct v4l2_rect * __mt9p031_get_pad_crop(struct mt9p031 *mt9p031, struct v4l2_subdev_state *sd_state, unsigned int pad, u32 which) { … } static int mt9p031_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_format *fmt) { … } static int mt9p031_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_format *format) { … } static int mt9p031_get_selection(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_selection *sel) { … } static int mt9p031_set_selection(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_selection *sel) { … } static int mt9p031_init_state(struct v4l2_subdev *subdev, struct v4l2_subdev_state *sd_state) { … } /* ----------------------------------------------------------------------------- * V4L2 subdev control operations */ #define V4L2_CID_BLC_AUTO … #define V4L2_CID_BLC_TARGET_LEVEL … #define V4L2_CID_BLC_ANALOG_OFFSET … #define V4L2_CID_BLC_DIGITAL_OFFSET … static int mt9p031_restore_blc(struct mt9p031 *mt9p031) { … } static int mt9p031_s_ctrl(struct v4l2_ctrl *ctrl) { … } static const struct v4l2_ctrl_ops mt9p031_ctrl_ops = …; static const char * const mt9p031_test_pattern_menu[] = …; static const struct v4l2_ctrl_config mt9p031_ctrls[] = …; /* ----------------------------------------------------------------------------- * V4L2 subdev core operations */ static int mt9p031_set_power(struct v4l2_subdev *subdev, int on) { … } /* ----------------------------------------------------------------------------- * V4L2 subdev internal operations */ static int mt9p031_registered(struct v4l2_subdev *subdev) { … } static int mt9p031_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) { … } static int mt9p031_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh) { … } static const struct v4l2_subdev_core_ops mt9p031_subdev_core_ops = …; static const struct v4l2_subdev_video_ops mt9p031_subdev_video_ops = …; static const struct v4l2_subdev_pad_ops mt9p031_subdev_pad_ops = …; static const struct v4l2_subdev_ops mt9p031_subdev_ops = …; static const struct v4l2_subdev_internal_ops mt9p031_subdev_internal_ops = …; /* ----------------------------------------------------------------------------- * Driver initialization and probing */ static struct mt9p031_platform_data * mt9p031_get_pdata(struct i2c_client *client) { … } static int mt9p031_probe(struct i2c_client *client) { … } static void mt9p031_remove(struct i2c_client *client) { … } static const struct i2c_device_id mt9p031_id[] = …; MODULE_DEVICE_TABLE(i2c, mt9p031_id); static const struct of_device_id mt9p031_of_match[] = …; MODULE_DEVICE_TABLE(of, mt9p031_of_match); static struct i2c_driver mt9p031_i2c_driver = …; module_i2c_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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