linux/drivers/media/i2c/ov8865.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2020 Kévin L'hôpital <[email protected]>
 * Copyright 2020 Bootlin
 * Author: Paul Kocialkowski <[email protected]>
 */

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/of_graph.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#include <linux/videodev2.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-fwnode.h>
#include <media/v4l2-image-sizes.h>
#include <media/v4l2-mediabus.h>

/* Register definitions */

/* System */

#define OV8865_SW_STANDBY_REG
#define OV8865_SW_STANDBY_STREAM_ON

#define OV8865_SW_RESET_REG
#define OV8865_SW_RESET_RESET

#define OV8865_PLL_CTRL0_REG
#define OV8865_PLL_CTRL0_PRE_DIV(v)
#define OV8865_PLL_CTRL1_REG
#define OV8865_PLL_CTRL1_MUL_H(v)
#define OV8865_PLL_CTRL2_REG
#define OV8865_PLL_CTRL2_MUL_L(v)
#define OV8865_PLL_CTRL3_REG
#define OV8865_PLL_CTRL3_M_DIV(v)
#define OV8865_PLL_CTRL4_REG
#define OV8865_PLL_CTRL4_MIPI_DIV(v)
#define OV8865_PLL_CTRL5_REG
#define OV8865_PLL_CTRL5_SYS_PRE_DIV(v)
#define OV8865_PLL_CTRL6_REG
#define OV8865_PLL_CTRL6_SYS_DIV(v)

#define OV8865_PLL_CTRL8_REG
#define OV8865_PLL_CTRL9_REG
#define OV8865_PLL_CTRLA_REG
#define OV8865_PLL_CTRLA_PRE_DIV_HALF(v)
#define OV8865_PLL_CTRLB_REG
#define OV8865_PLL_CTRLB_PRE_DIV(v)
#define OV8865_PLL_CTRLC_REG
#define OV8865_PLL_CTRLC_MUL_H(v)
#define OV8865_PLL_CTRLD_REG
#define OV8865_PLL_CTRLD_MUL_L(v)
#define OV8865_PLL_CTRLE_REG
#define OV8865_PLL_CTRLE_SYS_DIV(v)
#define OV8865_PLL_CTRLF_REG
#define OV8865_PLL_CTRLF_SYS_PRE_DIV(v)
#define OV8865_PLL_CTRL10_REG
#define OV8865_PLL_CTRL11_REG
#define OV8865_PLL_CTRL12_REG
#define OV8865_PLL_CTRL12_PRE_DIV_HALF(v)
#define OV8865_PLL_CTRL12_DAC_DIV(v)

#define OV8865_PLL_CTRL1B_REG
#define OV8865_PLL_CTRL1C_REG

#define OV8865_PLL_CTRL1E_REG
#define OV8865_PLL_CTRL1E_PLL1_NO_LAT

#define OV8865_PAD_OEN0_REG

#define OV8865_PAD_OEN2_REG

#define OV8865_CLK_RST5_REG

#define OV8865_CHIP_ID_HH_REG
#define OV8865_CHIP_ID_HH_VALUE
#define OV8865_CHIP_ID_H_REG
#define OV8865_CHIP_ID_H_VALUE
#define OV8865_CHIP_ID_L_REG
#define OV8865_CHIP_ID_L_VALUE
#define OV8865_PAD_OUT2_REG

#define OV8865_PAD_SEL2_REG
#define OV8865_PAD_PK_REG
#define OV8865_PAD_PK_DRIVE_STRENGTH_1X
#define OV8865_PAD_PK_DRIVE_STRENGTH_2X
#define OV8865_PAD_PK_DRIVE_STRENGTH_3X
#define OV8865_PAD_PK_DRIVE_STRENGTH_4X

#define OV8865_PUMP_CLK_DIV_REG
#define OV8865_PUMP_CLK_DIV_PUMP_N(v)
#define OV8865_PUMP_CLK_DIV_PUMP_P(v)

#define OV8865_MIPI_SC_CTRL0_REG
#define OV8865_MIPI_SC_CTRL0_LANES(v)
#define OV8865_MIPI_SC_CTRL0_MIPI_EN
#define OV8865_MIPI_SC_CTRL0_UNKNOWN
#define OV8865_MIPI_SC_CTRL0_LANES_PD_MIPI
#define OV8865_MIPI_SC_CTRL1_REG
#define OV8865_CLK_RST0_REG
#define OV8865_CLK_RST1_REG
#define OV8865_CLK_RST2_REG
#define OV8865_CLK_RST3_REG
#define OV8865_CLK_RST4_REG

#define OV8865_PCLK_SEL_REG
#define OV8865_PCLK_SEL_PCLK_DIV_MASK
#define OV8865_PCLK_SEL_PCLK_DIV(v)

#define OV8865_MISC_CTRL_REG
#define OV8865_MIPI_SC_CTRL2_REG
#define OV8865_MIPI_SC_CTRL2_CLK_LANES_PD_MIPI
#define OV8865_MIPI_SC_CTRL2_PD_MIPI_RST_SYNC

#define OV8865_MIPI_BIT_SEL_REG
#define OV8865_MIPI_BIT_SEL(v)
#define OV8865_CLK_SEL0_REG
#define OV8865_CLK_SEL0_PLL1_SYS_SEL(v)
#define OV8865_CLK_SEL1_REG
#define OV8865_CLK_SEL1_MIPI_EOF
#define OV8865_CLK_SEL1_UNKNOWN
#define OV8865_CLK_SEL1_PLL_SCLK_SEL_MASK
#define OV8865_CLK_SEL1_PLL_SCLK_SEL(v)

#define OV8865_SCLK_CTRL_REG
#define OV8865_SCLK_CTRL_SCLK_DIV(v)
#define OV8865_SCLK_CTRL_SCLK_PRE_DIV(v)
#define OV8865_SCLK_CTRL_UNKNOWN

/* Exposure/gain */

#define OV8865_EXPOSURE_CTRL_HH_REG
#define OV8865_EXPOSURE_CTRL_HH(v)
#define OV8865_EXPOSURE_CTRL_H_REG
#define OV8865_EXPOSURE_CTRL_H(v)
#define OV8865_EXPOSURE_CTRL_L_REG
#define OV8865_EXPOSURE_CTRL_L(v)
#define OV8865_EXPOSURE_GAIN_MANUAL_REG
#define OV8865_INTEGRATION_TIME_MARGIN

#define OV8865_GAIN_CTRL_H_REG
#define OV8865_GAIN_CTRL_H(v)
#define OV8865_GAIN_CTRL_L_REG
#define OV8865_GAIN_CTRL_L(v)

/* Timing */

#define OV8865_CROP_START_X_H_REG
#define OV8865_CROP_START_X_H(v)
#define OV8865_CROP_START_X_L_REG
#define OV8865_CROP_START_X_L(v)
#define OV8865_CROP_START_Y_H_REG
#define OV8865_CROP_START_Y_H(v)
#define OV8865_CROP_START_Y_L_REG
#define OV8865_CROP_START_Y_L(v)
#define OV8865_CROP_END_X_H_REG
#define OV8865_CROP_END_X_H(v)
#define OV8865_CROP_END_X_L_REG
#define OV8865_CROP_END_X_L(v)
#define OV8865_CROP_END_Y_H_REG
#define OV8865_CROP_END_Y_H(v)
#define OV8865_CROP_END_Y_L_REG
#define OV8865_CROP_END_Y_L(v)
#define OV8865_OUTPUT_SIZE_X_H_REG
#define OV8865_OUTPUT_SIZE_X_H(v)
#define OV8865_OUTPUT_SIZE_X_L_REG
#define OV8865_OUTPUT_SIZE_X_L(v)
#define OV8865_OUTPUT_SIZE_Y_H_REG
#define OV8865_OUTPUT_SIZE_Y_H(v)
#define OV8865_OUTPUT_SIZE_Y_L_REG
#define OV8865_OUTPUT_SIZE_Y_L(v)
#define OV8865_HTS_H_REG
#define OV8865_HTS_H(v)
#define OV8865_HTS_L_REG
#define OV8865_HTS_L(v)
#define OV8865_VTS_H_REG
#define OV8865_VTS_H(v)
#define OV8865_VTS_L_REG
#define OV8865_VTS_L(v)
#define OV8865_TIMING_MAX_VTS
#define OV8865_TIMING_MIN_VTS
#define OV8865_OFFSET_X_H_REG
#define OV8865_OFFSET_X_H(v)
#define OV8865_OFFSET_X_L_REG
#define OV8865_OFFSET_X_L(v)
#define OV8865_OFFSET_Y_H_REG
#define OV8865_OFFSET_Y_H(v)
#define OV8865_OFFSET_Y_L_REG
#define OV8865_OFFSET_Y_L(v)
#define OV8865_INC_X_ODD_REG
#define OV8865_INC_X_ODD(v)
#define OV8865_INC_X_EVEN_REG
#define OV8865_INC_X_EVEN(v)
#define OV8865_VSYNC_START_H_REG
#define OV8865_VSYNC_START_H(v)
#define OV8865_VSYNC_START_L_REG
#define OV8865_VSYNC_START_L(v)
#define OV8865_VSYNC_END_H_REG
#define OV8865_VSYNC_END_H(v)
#define OV8865_VSYNC_END_L_REG
#define OV8865_VSYNC_END_L(v)
#define OV8865_HSYNC_FIRST_H_REG
#define OV8865_HSYNC_FIRST_H(v)
#define OV8865_HSYNC_FIRST_L_REG
#define OV8865_HSYNC_FIRST_L(v)

#define OV8865_FORMAT1_REG
#define OV8865_FORMAT1_FLIP_VERT_ISP_EN
#define OV8865_FORMAT1_FLIP_VERT_SENSOR_EN
#define OV8865_FORMAT2_REG
#define OV8865_FORMAT2_HSYNC_EN
#define OV8865_FORMAT2_FST_VBIN_EN
#define OV8865_FORMAT2_FST_HBIN_EN
#define OV8865_FORMAT2_ISP_HORZ_VAR2_EN
#define OV8865_FORMAT2_FLIP_HORZ_ISP_EN
#define OV8865_FORMAT2_FLIP_HORZ_SENSOR_EN
#define OV8865_FORMAT2_SYNC_HBIN_EN

#define OV8865_INC_Y_ODD_REG
#define OV8865_INC_Y_ODD(v)
#define OV8865_INC_Y_EVEN_REG
#define OV8865_INC_Y_EVEN(v)

#define OV8865_ABLC_NUM_REG
#define OV8865_ABLC_NUM(v)

#define OV8865_ZLINE_NUM_REG
#define OV8865_ZLINE_NUM(v)

#define OV8865_AUTO_SIZE_CTRL_REG
#define OV8865_AUTO_SIZE_CTRL_OFFSET_Y_REG
#define OV8865_AUTO_SIZE_CTRL_OFFSET_X_REG
#define OV8865_AUTO_SIZE_CTRL_CROP_END_Y_REG
#define OV8865_AUTO_SIZE_CTRL_CROP_END_X_REG
#define OV8865_AUTO_SIZE_CTRL_CROP_START_Y_REG
#define OV8865_AUTO_SIZE_CTRL_CROP_START_X_REG
#define OV8865_AUTO_SIZE_X_OFFSET_H_REG
#define OV8865_AUTO_SIZE_X_OFFSET_L_REG
#define OV8865_AUTO_SIZE_Y_OFFSET_H_REG
#define OV8865_AUTO_SIZE_Y_OFFSET_L_REG
#define OV8865_AUTO_SIZE_BOUNDARIES_REG
#define OV8865_AUTO_SIZE_BOUNDARIES_Y(v)
#define OV8865_AUTO_SIZE_BOUNDARIES_X(v)

/* PSRAM */

#define OV8865_PSRAM_CTRL8_REG

/* Black Level */

#define OV8865_BLC_CTRL0_REG
#define OV8865_BLC_CTRL0_TRIG_RANGE_EN
#define OV8865_BLC_CTRL0_TRIG_FORMAT_EN
#define OV8865_BLC_CTRL0_TRIG_GAIN_EN
#define OV8865_BLC_CTRL0_TRIG_EXPOSURE_EN
#define OV8865_BLC_CTRL0_TRIG_MANUAL_EN
#define OV8865_BLC_CTRL0_FREEZE_EN
#define OV8865_BLC_CTRL0_ALWAYS_EN
#define OV8865_BLC_CTRL0_FILTER_EN
#define OV8865_BLC_CTRL1_REG
#define OV8865_BLC_CTRL1_DITHER_EN
#define OV8865_BLC_CTRL1_ZERO_LINE_DIFF_EN
#define OV8865_BLC_CTRL1_COL_SHIFT_256
#define OV8865_BLC_CTRL1_COL_SHIFT_128
#define OV8865_BLC_CTRL1_COL_SHIFT_64
#define OV8865_BLC_CTRL1_COL_SHIFT_32
#define OV8865_BLC_CTRL1_OFFSET_LIMIT_EN
#define OV8865_BLC_CTRL1_COLUMN_CANCEL_EN
#define OV8865_BLC_CTRL2_REG
#define OV8865_BLC_CTRL3_REG
#define OV8865_BLC_CTRL4_REG
#define OV8865_BLC_CTRL5_REG
#define OV8865_BLC_CTRL6_REG
#define OV8865_BLC_CTRL7_REG
#define OV8865_BLC_CTRL8_REG
#define OV8865_BLC_CTRL9_REG
#define OV8865_BLC_CTRLA_REG
#define OV8865_BLC_CTRLB_REG
#define OV8865_BLC_CTRLC_REG
#define OV8865_BLC_CTRLD_REG
#define OV8865_BLC_CTRLD_OFFSET_TRIGGER(v)

#define OV8865_BLC_CTRL1F_REG
#define OV8865_BLC_CTRL1F_RB_REVERSE
#define OV8865_BLC_CTRL1F_INTERPOL_X_EN
#define OV8865_BLC_CTRL1F_INTERPOL_Y_EN

#define OV8865_BLC_ANCHOR_LEFT_START_H_REG
#define OV8865_BLC_ANCHOR_LEFT_START_H(v)
#define OV8865_BLC_ANCHOR_LEFT_START_L_REG
#define OV8865_BLC_ANCHOR_LEFT_START_L(v)
#define OV8865_BLC_ANCHOR_LEFT_END_H_REG
#define OV8865_BLC_ANCHOR_LEFT_END_H(v)
#define OV8865_BLC_ANCHOR_LEFT_END_L_REG
#define OV8865_BLC_ANCHOR_LEFT_END_L(v)
#define OV8865_BLC_ANCHOR_RIGHT_START_H_REG
#define OV8865_BLC_ANCHOR_RIGHT_START_H(v)
#define OV8865_BLC_ANCHOR_RIGHT_START_L_REG
#define OV8865_BLC_ANCHOR_RIGHT_START_L(v)
#define OV8865_BLC_ANCHOR_RIGHT_END_H_REG
#define OV8865_BLC_ANCHOR_RIGHT_END_H(v)
#define OV8865_BLC_ANCHOR_RIGHT_END_L_REG
#define OV8865_BLC_ANCHOR_RIGHT_END_L(v)

#define OV8865_BLC_TOP_ZLINE_START_REG
#define OV8865_BLC_TOP_ZLINE_START(v)
#define OV8865_BLC_TOP_ZLINE_NUM_REG
#define OV8865_BLC_TOP_ZLINE_NUM(v)
#define OV8865_BLC_TOP_BLKLINE_START_REG
#define OV8865_BLC_TOP_BLKLINE_START(v)
#define OV8865_BLC_TOP_BLKLINE_NUM_REG
#define OV8865_BLC_TOP_BLKLINE_NUM(v)
#define OV8865_BLC_BOT_ZLINE_START_REG
#define OV8865_BLC_BOT_ZLINE_START(v)
#define OV8865_BLC_BOT_ZLINE_NUM_REG
#define OV8865_BLC_BOT_ZLINE_NUM(v)
#define OV8865_BLC_BOT_BLKLINE_START_REG
#define OV8865_BLC_BOT_BLKLINE_START(v)
#define OV8865_BLC_BOT_BLKLINE_NUM_REG
#define OV8865_BLC_BOT_BLKLINE_NUM(v)

#define OV8865_BLC_OFFSET_LIMIT_REG
#define OV8865_BLC_OFFSET_LIMIT(v)

/* VFIFO */

#define OV8865_VFIFO_READ_START_H_REG
#define OV8865_VFIFO_READ_START_H(v)
#define OV8865_VFIFO_READ_START_L_REG
#define OV8865_VFIFO_READ_START_L(v)

/* MIPI */

#define OV8865_MIPI_CTRL0_REG
#define OV8865_MIPI_CTRL1_REG
#define OV8865_MIPI_CTRL2_REG
#define OV8865_MIPI_CTRL3_REG
#define OV8865_MIPI_CTRL4_REG
#define OV8865_MIPI_CTRL5_REG
#define OV8865_MIPI_CTRL6_REG
#define OV8865_MIPI_CTRL7_REG
#define OV8865_MIPI_CTRL8_REG

#define OV8865_MIPI_FCNT_MAX_H_REG
#define OV8865_MIPI_FCNT_MAX_L_REG

#define OV8865_MIPI_CTRL13_REG
#define OV8865_MIPI_CTRL14_REG
#define OV8865_MIPI_CTRL15_REG
#define OV8865_MIPI_EMBEDDED_DT_REG

#define OV8865_MIPI_HS_ZERO_MIN_H_REG
#define OV8865_MIPI_HS_ZERO_MIN_L_REG
#define OV8865_MIPI_HS_TRAIL_MIN_H_REG
#define OV8865_MIPI_HS_TRAIL_MIN_L_REG
#define OV8865_MIPI_CLK_ZERO_MIN_H_REG
#define OV8865_MIPI_CLK_ZERO_MIN_L_REG
#define OV8865_MIPI_CLK_PREPARE_MAX_REG
#define OV8865_MIPI_CLK_PREPARE_MIN_REG
#define OV8865_MIPI_CLK_POST_MIN_H_REG
#define OV8865_MIPI_CLK_POST_MIN_L_REG
#define OV8865_MIPI_CLK_TRAIL_MIN_H_REG
#define OV8865_MIPI_CLK_TRAIL_MIN_L_REG
#define OV8865_MIPI_LPX_P_MIN_H_REG
#define OV8865_MIPI_LPX_P_MIN_L_REG
#define OV8865_MIPI_HS_PREPARE_MIN_REG
#define OV8865_MIPI_HS_PREPARE_MAX_REG
#define OV8865_MIPI_HS_EXIT_MIN_H_REG
#define OV8865_MIPI_HS_EXIT_MIN_L_REG
#define OV8865_MIPI_UI_HS_ZERO_MIN_REG
#define OV8865_MIPI_UI_HS_TRAIL_MIN_REG
#define OV8865_MIPI_UI_CLK_ZERO_MIN_REG
#define OV8865_MIPI_UI_CLK_PREPARE_REG
#define OV8865_MIPI_UI_CLK_POST_MIN_REG
#define OV8865_MIPI_UI_CLK_TRAIL_MIN_REG
#define OV8865_MIPI_UI_LPX_P_MIN_REG
#define OV8865_MIPI_UI_HS_PREPARE_REG
#define OV8865_MIPI_UI_HS_EXIT_MIN_REG
#define OV8865_MIPI_PKT_START_SIZE_REG

#define OV8865_MIPI_PCLK_PERIOD_REG
#define OV8865_MIPI_LP_GPIO0_REG
#define OV8865_MIPI_LP_GPIO1_REG

#define OV8865_MIPI_CTRL3C_REG
#define OV8865_MIPI_LP_GPIO4_REG

#define OV8865_MIPI_CTRL4A_REG
#define OV8865_MIPI_CTRL4B_REG
#define OV8865_MIPI_CTRL4C_REG
#define OV8865_MIPI_LANE_TEST_PATTERN_REG
#define OV8865_MIPI_FRAME_END_DELAY_REG
#define OV8865_MIPI_CLOCK_TEST_PATTERN_REG
#define OV8865_MIPI_LANE_SEL01_REG
#define OV8865_MIPI_LANE_SEL01_LANE0(v)
#define OV8865_MIPI_LANE_SEL01_LANE1(v)
#define OV8865_MIPI_LANE_SEL23_REG
#define OV8865_MIPI_LANE_SEL23_LANE2(v)
#define OV8865_MIPI_LANE_SEL23_LANE3(v)

/* ISP */

#define OV8865_ISP_CTRL0_REG
#define OV8865_ISP_CTRL0_LENC_EN
#define OV8865_ISP_CTRL0_WHITE_BALANCE_EN
#define OV8865_ISP_CTRL0_DPC_BLACK_EN
#define OV8865_ISP_CTRL0_DPC_WHITE_EN
#define OV8865_ISP_CTRL1_REG
#define OV8865_ISP_CTRL1_BLC_EN
#define OV8865_ISP_CTRL2_REG
#define OV8865_ISP_CTRL2_DEBUG
#define OV8865_ISP_CTRL2_VARIOPIXEL_EN
#define OV8865_ISP_CTRL2_VSYNC_LATCH_EN
#define OV8865_ISP_CTRL3_REG

#define OV8865_ISP_GAIN_RED_H_REG
#define OV8865_ISP_GAIN_RED_H(v)
#define OV8865_ISP_GAIN_RED_L_REG
#define OV8865_ISP_GAIN_RED_L(v)
#define OV8865_ISP_GAIN_GREEN_H_REG
#define OV8865_ISP_GAIN_GREEN_H(v)
#define OV8865_ISP_GAIN_GREEN_L_REG
#define OV8865_ISP_GAIN_GREEN_L(v)
#define OV8865_ISP_GAIN_BLUE_H_REG
#define OV8865_ISP_GAIN_BLUE_H(v)
#define OV8865_ISP_GAIN_BLUE_L_REG
#define OV8865_ISP_GAIN_BLUE_L(v)

/* VarioPixel */

#define OV8865_VAP_CTRL0_REG
#define OV8865_VAP_CTRL1_REG
#define OV8865_VAP_CTRL1_HSUB_COEF(v)
#define OV8865_VAP_CTRL1_VSUB_COEF(v)

/* Pre-DSP */

#define OV8865_PRE_CTRL0_REG
#define OV8865_PRE_CTRL0_PATTERN_EN
#define OV8865_PRE_CTRL0_ROLLING_BAR_EN
#define OV8865_PRE_CTRL0_TRANSPARENT_MODE
#define OV8865_PRE_CTRL0_SQUARES_BW_MODE
#define OV8865_PRE_CTRL0_PATTERN_COLOR_BARS
#define OV8865_PRE_CTRL0_PATTERN_RANDOM_DATA
#define OV8865_PRE_CTRL0_PATTERN_COLOR_SQUARES
#define OV8865_PRE_CTRL0_PATTERN_BLACK

/* Pixel Array */

#define OV8865_NATIVE_WIDTH
#define OV8865_NATIVE_HEIGHT
#define OV8865_ACTIVE_START_LEFT
#define OV8865_ACTIVE_START_TOP
#define OV8865_ACTIVE_WIDTH
#define OV8865_ACTIVE_HEIGHT

/* Macros */

#define ov8865_subdev_sensor(s)

#define ov8865_ctrl_subdev(c)

/* Data structures */

struct ov8865_register_value {};

/*
 * PLL1 Clock Tree:
 *
 * +-< EXTCLK
 * |
 * +-+ pll_pre_div_half (0x30a [0])
 *   |
 *   +-+ pll_pre_div (0x300 [2:0], special values:
 *     |              0: 1, 1: 1.5, 3: 2.5, 4: 3, 5: 4, 7: 8)
 *     +-+ pll_mul (0x301 [1:0], 0x302 [7:0])
 *       |
 *       +-+ m_div (0x303 [3:0])
 *       | |
 *       | +-> PHY_SCLK
 *       | |
 *       | +-+ mipi_div (0x304 [1:0], special values: 0: 4, 1: 5, 2: 6, 3: 8)
 *       |   |
 *       |   +-+ pclk_div (0x3020 [3])
 *       |     |
 *       |     +-> PCLK
 *       |
 *       +-+ sys_pre_div (0x305 [1:0], special values: 0: 3, 1: 4, 2: 5, 3: 6)
 *         |
 *         +-+ sys_div (0x306 [0])
 *           |
 *           +-+ sys_sel (0x3032 [7], 0: PLL1, 1: PLL2)
 *             |
 *             +-+ sclk_sel (0x3033 [1], 0: sys_sel, 1: PLL2 DAC_CLK)
 *               |
 *               +-+ sclk_pre_div (0x3106 [3:2], special values:
 *                 |               0: 1, 1: 2, 2: 4, 3: 1)
 *                 |
 *                 +-+ sclk_div (0x3106 [7:4], special values: 0: 1)
 *                   |
 *                   +-> SCLK
 */

struct ov8865_pll1_config {};

/*
 * PLL2 Clock Tree:
 *
 * +-< EXTCLK
 * |
 * +-+ pll_pre_div_half (0x312 [4])
 *   |
 *   +-+ pll_pre_div (0x30b [2:0], special values:
 *     |              0: 1, 1: 1.5, 3: 2.5, 4: 3, 5: 4, 7: 8)
 *     +-+ pll_mul (0x30c [1:0], 0x30d [7:0])
 *       |
 *       +-+ dac_div (0x312 [3:0])
 *       | |
 *       | +-> DAC_CLK
 *       |
 *       +-+ sys_pre_div (0x30f [3:0])
 *         |
 *         +-+ sys_div (0x30e [2:0], special values:
 *           |          0: 1, 1: 1.5, 3: 2.5, 4: 3, 5: 3.5, 6: 4, 7:5)
 *           |
 *           +-+ sys_sel (0x3032 [7], 0: PLL1, 1: PLL2)
 *             |
 *             +-+ sclk_sel (0x3033 [1], 0: sys_sel, 1: PLL2 DAC_CLK)
 *               |
 *               +-+ sclk_pre_div (0x3106 [3:2], special values:
 *                 |               0: 1, 1: 2, 2: 4, 3: 1)
 *                 |
 *                 +-+ sclk_div (0x3106 [7:4], special values: 0: 1)
 *                   |
 *                   +-> SCLK
 */

struct ov8865_pll2_config {};

struct ov8865_sclk_config {};

struct ov8865_pll_configs {};

/* Clock rate */

enum extclk_rate {};

static const unsigned long supported_extclk_rates[] =;

/*
 * General formulas for (array-centered) mode calculation:
 * - photo_array_width = 3296
 * - crop_start_x = (photo_array_width - output_size_x) / 2
 * - crop_end_x = crop_start_x + offset_x + output_size_x - 1
 *
 * - photo_array_height = 2480
 * - crop_start_y = (photo_array_height - output_size_y) / 2
 * - crop_end_y = crop_start_y + offset_y + output_size_y - 1
 */

struct ov8865_mode {};

struct ov8865_state {};

struct ov8865_ctrls {};

struct ov8865_sensor {};

/* Static definitions */

/*
 * PHY_SCLK = 720 MHz
 * MIPI_PCLK = 90 MHz
 */

static const struct ov8865_pll1_config ov8865_pll1_config_native_19_2mhz =;

static const struct ov8865_pll1_config ov8865_pll1_config_native_24mhz =;

/*
 * DAC_CLK = 360 MHz
 * SCLK = 144 MHz
 */

static const struct ov8865_pll2_config ov8865_pll2_config_native_19_2mhz =;

static const struct ov8865_pll2_config ov8865_pll2_config_native_24mhz =;

/*
 * DAC_CLK = 360 MHz
 * SCLK = 72 MHz
 */

static const struct ov8865_pll2_config ov8865_pll2_config_binning_19_2mhz =;

static const struct ov8865_pll2_config ov8865_pll2_config_binning_24mhz =;

static const struct ov8865_pll_configs ov8865_pll_configs_19_2mhz =;

static const struct ov8865_pll_configs ov8865_pll_configs_24mhz =;

static const struct ov8865_pll_configs *ov8865_pll_configs[] =;

static const struct ov8865_sclk_config ov8865_sclk_config_native =;

static const struct ov8865_register_value ov8865_register_values_native[] =;

static const struct ov8865_register_value ov8865_register_values_binning[] =;

static const struct ov8865_mode ov8865_modes[] =;

static const u32 ov8865_mbus_codes[] =;

static const struct ov8865_register_value ov8865_init_sequence[] =;

static const s64 ov8865_link_freq_menu[] =;

static const char *const ov8865_test_pattern_menu[] =;

static const u8 ov8865_test_pattern_bits[] =;

/* Input/Output */

static int ov8865_read(struct ov8865_sensor *sensor, u16 address, u8 *value)
{}

static int ov8865_write(struct ov8865_sensor *sensor, u16 address, u8 value)
{}

static int ov8865_write_sequence(struct ov8865_sensor *sensor,
				 const struct ov8865_register_value *sequence,
				 unsigned int sequence_count)
{}

static int ov8865_update_bits(struct ov8865_sensor *sensor, u16 address,
			      u8 mask, u8 bits)
{}

/* Sensor */

static int ov8865_sw_reset(struct ov8865_sensor *sensor)
{}

static int ov8865_sw_standby(struct ov8865_sensor *sensor, int standby)
{}

static int ov8865_chip_id_check(struct ov8865_sensor *sensor)
{}

static int ov8865_charge_pump_configure(struct ov8865_sensor *sensor)
{}

static int ov8865_mipi_configure(struct ov8865_sensor *sensor)
{}

static int ov8865_black_level_configure(struct ov8865_sensor *sensor)
{}

static int ov8865_isp_configure(struct ov8865_sensor *sensor)
{}

static unsigned long ov8865_mode_pll1_rate(struct ov8865_sensor *sensor,
					   const struct ov8865_mode *mode)
{}

static int ov8865_mode_pll1_configure(struct ov8865_sensor *sensor,
				      const struct ov8865_mode *mode,
				      u32 mbus_code)
{}

static int ov8865_mode_pll2_configure(struct ov8865_sensor *sensor,
				      const struct ov8865_mode *mode)
{}

static int ov8865_mode_sclk_configure(struct ov8865_sensor *sensor,
				      const struct ov8865_mode *mode)
{}

static int ov8865_mode_binning_configure(struct ov8865_sensor *sensor,
					 const struct ov8865_mode *mode)
{}

static int ov8865_mode_black_level_configure(struct ov8865_sensor *sensor,
					     const struct ov8865_mode *mode)
{}

static int ov8865_mode_configure(struct ov8865_sensor *sensor,
				 const struct ov8865_mode *mode, u32 mbus_code)
{}

static unsigned long ov8865_mode_mipi_clk_rate(struct ov8865_sensor *sensor,
					       const struct ov8865_mode *mode)
{}

/* Exposure */

static int ov8865_exposure_configure(struct ov8865_sensor *sensor, u32 exposure)
{}

/* Gain */

static int ov8865_analog_gain_configure(struct ov8865_sensor *sensor, u32 gain)
{}

/* White Balance */

static int ov8865_red_balance_configure(struct ov8865_sensor *sensor,
					u32 red_balance)
{}

static int ov8865_blue_balance_configure(struct ov8865_sensor *sensor,
					 u32 blue_balance)
{}

/* Flip */

static int ov8865_flip_vert_configure(struct ov8865_sensor *sensor, bool enable)
{}

static int ov8865_flip_horz_configure(struct ov8865_sensor *sensor, bool enable)
{}

/* Test Pattern */

static int ov8865_test_pattern_configure(struct ov8865_sensor *sensor,
					 unsigned int index)
{}

/* Blanking */

static int ov8865_vts_configure(struct ov8865_sensor *sensor, u32 vblank)
{}

/* State */

static int ov8865_state_mipi_configure(struct ov8865_sensor *sensor,
				       const struct ov8865_mode *mode,
				       u32 mbus_code)
{}

static int ov8865_state_configure(struct ov8865_sensor *sensor,
				  const struct ov8865_mode *mode,
				  u32 mbus_code)
{}

static int ov8865_state_init(struct ov8865_sensor *sensor)
{}

/* Sensor Base */

static int ov8865_sensor_init(struct ov8865_sensor *sensor)
{}

static int ov8865_sensor_power(struct ov8865_sensor *sensor, bool on)
{}

/* Controls */

static int ov8865_s_ctrl(struct v4l2_ctrl *ctrl)
{}

static const struct v4l2_ctrl_ops ov8865_ctrl_ops =;

static int ov8865_ctrls_init(struct ov8865_sensor *sensor)
{}

/* Subdev Video Operations */

static int ov8865_s_stream(struct v4l2_subdev *subdev, int enable)
{}

static const struct v4l2_subdev_video_ops ov8865_subdev_video_ops =;

/* Subdev Pad Operations */

static int ov8865_enum_mbus_code(struct v4l2_subdev *subdev,
				 struct v4l2_subdev_state *sd_state,
				 struct v4l2_subdev_mbus_code_enum *code_enum)
{}

static void ov8865_mbus_format_fill(struct v4l2_mbus_framefmt *mbus_format,
				    u32 mbus_code,
				    const struct ov8865_mode *mode)
{}

static int ov8865_get_fmt(struct v4l2_subdev *subdev,
			  struct v4l2_subdev_state *sd_state,
			  struct v4l2_subdev_format *format)
{}

static int ov8865_set_fmt(struct v4l2_subdev *subdev,
			  struct v4l2_subdev_state *sd_state,
			  struct v4l2_subdev_format *format)
{}

static int ov8865_enum_frame_size(struct v4l2_subdev *subdev,
				  struct v4l2_subdev_state *sd_state,
				  struct v4l2_subdev_frame_size_enum *size_enum)
{}

static void
__ov8865_get_pad_crop(struct ov8865_sensor *sensor,
		      struct v4l2_subdev_state *state, unsigned int pad,
		      enum v4l2_subdev_format_whence which, struct v4l2_rect *r)
{}

static int ov8865_get_selection(struct v4l2_subdev *subdev,
				struct v4l2_subdev_state *state,
				struct v4l2_subdev_selection *sel)
{}

static int ov8865_get_frame_interval(struct v4l2_subdev *subdev,
				     struct v4l2_subdev_state *sd_state,
				     struct v4l2_subdev_frame_interval *interval)
{}

static const struct v4l2_subdev_pad_ops ov8865_subdev_pad_ops =;

static const struct v4l2_subdev_ops ov8865_subdev_ops =;

static int ov8865_suspend(struct device *dev)
{}

static int ov8865_resume(struct device *dev)
{}

static int ov8865_probe(struct i2c_client *client)
{}

static void ov8865_remove(struct i2c_client *client)
{}

static const struct dev_pm_ops ov8865_pm_ops =;

static const struct acpi_device_id ov8865_acpi_match[] =;
MODULE_DEVICE_TABLE(acpi, ov8865_acpi_match);

static const struct of_device_id ov8865_of_match[] =;
MODULE_DEVICE_TABLE(of, ov8865_of_match);

static struct i2c_driver ov8865_driver =;

module_i2c_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();