/* SPDX-License-Identifier: GPL-2.0-or-later */ /* saa7115.h - definition for saa7111/3/4/5 inputs and frequency flags Copyright (C) 2006 Hans Verkuil ([email protected]) */ #ifndef _SAA7115_H_ #define _SAA7115_H_ /* s_routing inputs, outputs, and config */ /* SAA7111/3/4/5 HW inputs */ #define SAA7115_COMPOSITE0 … #define SAA7115_COMPOSITE1 … #define SAA7115_COMPOSITE2 … #define SAA7115_COMPOSITE3 … #define SAA7115_COMPOSITE4 … #define SAA7115_COMPOSITE5 … #define SAA7115_SVIDEO0 … #define SAA7115_SVIDEO1 … #define SAA7115_SVIDEO2 … #define SAA7115_SVIDEO3 … /* outputs */ #define SAA7115_IPORT_ON … #define SAA7115_IPORT_OFF … /* SAA7111 specific outputs. */ #define SAA7111_VBI_BYPASS … #define SAA7111_FMT_YUV422 … #define SAA7111_FMT_RGB … #define SAA7111_FMT_CCIR … #define SAA7111_FMT_YUV411 … /* config flags */ /* * Register 0x85 should set bit 0 to 0 (it's 1 by default). This bit * controls the IDQ signal polarity which is set to 'inverted' if the bit * it 1 and to 'default' if it is 0. */ #define SAA7115_IDQ_IS_DEFAULT … /* s_crystal_freq values and flags */ /* SAA7115 v4l2_crystal_freq frequency values */ #define SAA7115_FREQ_32_11_MHZ … #define SAA7115_FREQ_24_576_MHZ … /* SAA7115 v4l2_crystal_freq audio clock control flags */ #define SAA7115_FREQ_FL_UCGC … #define SAA7115_FREQ_FL_CGCDIV … #define SAA7115_FREQ_FL_APLL … #define SAA7115_FREQ_FL_DOUBLE_ASCLK … /* ===== SAA7113 Config enums ===== */ /* Register 0x08 "Horizontal time constant" [Bit 3..4]: * Should be set to "Fast Locking Mode" according to the datasheet, * and that is the default setting in the gm7113c_init table. * saa7113_init sets this value to "VTR Mode". */ enum saa7113_r08_htc { … }; /* Register 0x10 "Output format selection" [Bit 6..7]: * Defaults to ITU_656 as specified in datasheet. */ enum saa7113_r10_ofts { … }; /* * Register 0x12 "Output control" [Bit 0..3 Or Bit 4..7]: * This is used to select what data is output on the RTS0 and RTS1 pins. * RTS1 [Bit 4..7] Defaults to DOT_IN. (This value can not be set for RTS0) * RTS0 [Bit 0..3] Defaults to VIPB in gm7113c_init as specified * in the datasheet, but is set to HREF_HS in the saa7113_init table. */ enum saa7113_r12_rts { … }; /** * struct saa7115_platform_data - Allow overriding default initialization * * @saa7113_force_gm7113c_init: Force the use of the gm7113c_init table * instead of saa7113_init table * (saa7113 only) * @saa7113_r08_htc: [R_08 - Bit 3..4] * @saa7113_r10_vrln: [R_10 - Bit 3] * default: Disabled for gm7113c_init * Enabled for saa7113c_init * @saa7113_r10_ofts: [R_10 - Bit 6..7] * @saa7113_r12_rts0: [R_12 - Bit 0..3] * @saa7113_r12_rts1: [R_12 - Bit 4..7] * @saa7113_r13_adlsb: [R_13 - Bit 7] - default: disabled */ struct saa7115_platform_data { … }; #endif
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