// SPDX-License-Identifier: GPL-2.0-only /* * drxk_hard: DRX-K DVB-C/T demodulator driver * * Copyright (C) 2010-2011 Digital Devices GmbH */ #define pr_fmt(fmt) … #include <linux/kernel.h> #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/init.h> #include <linux/delay.h> #include <linux/firmware.h> #include <linux/i2c.h> #include <linux/hardirq.h> #include <asm/div64.h> #include <media/dvb_frontend.h> #include "drxk.h" #include "drxk_hard.h" #include <linux/int_log.h> static int power_down_dvbt(struct drxk_state *state, bool set_power_mode); static int power_down_qam(struct drxk_state *state); static int set_dvbt_standard(struct drxk_state *state, enum operation_mode o_mode); static int set_qam_standard(struct drxk_state *state, enum operation_mode o_mode); static int set_qam(struct drxk_state *state, u16 intermediate_freqk_hz, s32 tuner_freq_offset); static int set_dvbt_standard(struct drxk_state *state, enum operation_mode o_mode); static int dvbt_start(struct drxk_state *state); static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, s32 tuner_freq_offset); static int get_qam_lock_status(struct drxk_state *state, u32 *p_lock_status); static int get_dvbt_lock_status(struct drxk_state *state, u32 *p_lock_status); static int switch_antenna_to_qam(struct drxk_state *state); static int switch_antenna_to_dvbt(struct drxk_state *state); static bool is_dvbt(struct drxk_state *state) { … } static bool is_qam(struct drxk_state *state) { … } #define NOA1ROM … #define DRXDAP_FASI_SHORT_FORMAT(addr) … #define DRXDAP_FASI_LONG_FORMAT(addr) … #define DEFAULT_MER_83 … #define DEFAULT_MER_93 … #ifndef DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH #define DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH … #endif #ifndef DRXK_MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH #define DRXK_MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH … #endif #define DEFAULT_DRXK_MPEG_LOCK_TIMEOUT … #define DEFAULT_DRXK_DEMOD_LOCK_TIMEOUT … #ifndef DRXK_KI_RAGC_ATV #define DRXK_KI_RAGC_ATV … #endif #ifndef DRXK_KI_IAGC_ATV #define DRXK_KI_IAGC_ATV … #endif #ifndef DRXK_KI_DAGC_ATV #define DRXK_KI_DAGC_ATV … #endif #ifndef DRXK_KI_RAGC_QAM #define DRXK_KI_RAGC_QAM … #endif #ifndef DRXK_KI_IAGC_QAM #define DRXK_KI_IAGC_QAM … #endif #ifndef DRXK_KI_DAGC_QAM #define DRXK_KI_DAGC_QAM … #endif #ifndef DRXK_KI_RAGC_DVBT #define DRXK_KI_RAGC_DVBT … #endif #ifndef DRXK_KI_IAGC_DVBT #define DRXK_KI_IAGC_DVBT … #endif #ifndef DRXK_KI_DAGC_DVBT #define DRXK_KI_DAGC_DVBT … #endif #ifndef DRXK_AGC_DAC_OFFSET #define DRXK_AGC_DAC_OFFSET … #endif #ifndef DRXK_BANDWIDTH_8MHZ_IN_HZ #define DRXK_BANDWIDTH_8MHZ_IN_HZ … #endif #ifndef DRXK_BANDWIDTH_7MHZ_IN_HZ #define DRXK_BANDWIDTH_7MHZ_IN_HZ … #endif #ifndef DRXK_BANDWIDTH_6MHZ_IN_HZ #define DRXK_BANDWIDTH_6MHZ_IN_HZ … #endif #ifndef DRXK_QAM_SYMBOLRATE_MAX #define DRXK_QAM_SYMBOLRATE_MAX … #endif #define DRXK_BL_ROM_OFFSET_TAPS_DVBT … #define DRXK_BL_ROM_OFFSET_TAPS_ITU_A … #define DRXK_BL_ROM_OFFSET_TAPS_ITU_C … #define DRXK_BL_ROM_OFFSET_TAPS_BG … #define DRXK_BL_ROM_OFFSET_TAPS_DKILLP … #define DRXK_BL_ROM_OFFSET_TAPS_NTSC … #define DRXK_BL_ROM_OFFSET_TAPS_FM … #define DRXK_BL_ROM_OFFSET_UCODE … #define DRXK_BLC_TIMEOUT … #define DRXK_BLCC_NR_ELEMENTS_TAPS … #define DRXK_BLCC_NR_ELEMENTS_UCODE … #define DRXK_BLDC_NR_ELEMENTS_TAPS … #ifndef DRXK_OFDM_NE_NOTCH_WIDTH #define DRXK_OFDM_NE_NOTCH_WIDTH … #endif #define DRXK_QAM_SL_SIG_POWER_QAM16 … #define DRXK_QAM_SL_SIG_POWER_QAM32 … #define DRXK_QAM_SL_SIG_POWER_QAM64 … #define DRXK_QAM_SL_SIG_POWER_QAM128 … #define DRXK_QAM_SL_SIG_POWER_QAM256 … static unsigned int debug; module_param(debug, int, 0644); MODULE_PARM_DESC(…) …; #define dprintk(level, fmt, arg...) … static inline u32 Frac28a(u32 a, u32 c) { … } static inline u32 log10times100(u32 value) { … } /***************************************************************************/ /* I2C **********************************************************************/ /***************************************************************************/ static int drxk_i2c_lock(struct drxk_state *state) { … } static void drxk_i2c_unlock(struct drxk_state *state) { … } static int drxk_i2c_transfer(struct drxk_state *state, struct i2c_msg *msgs, unsigned len) { … } static int i2c_read1(struct drxk_state *state, u8 adr, u8 *val) { … } static int i2c_write(struct drxk_state *state, u8 adr, u8 *data, int len) { … } static int i2c_read(struct drxk_state *state, u8 adr, u8 *msg, int len, u8 *answ, int alen) { … } static int read16_flags(struct drxk_state *state, u32 reg, u16 *data, u8 flags) { … } static int read16(struct drxk_state *state, u32 reg, u16 *data) { … } static int read32_flags(struct drxk_state *state, u32 reg, u32 *data, u8 flags) { … } static int read32(struct drxk_state *state, u32 reg, u32 *data) { … } static int write16_flags(struct drxk_state *state, u32 reg, u16 data, u8 flags) { … } static int write16(struct drxk_state *state, u32 reg, u16 data) { … } static int write32_flags(struct drxk_state *state, u32 reg, u32 data, u8 flags) { … } static int write32(struct drxk_state *state, u32 reg, u32 data) { … } static int write_block(struct drxk_state *state, u32 address, const int block_size, const u8 p_block[]) { … } #ifndef DRXK_MAX_RETRIES_POWERUP #define DRXK_MAX_RETRIES_POWERUP … #endif static int power_up_device(struct drxk_state *state) { … } static int init_state(struct drxk_state *state) { … } static int drxx_open(struct drxk_state *state) { … } static int get_device_capabilities(struct drxk_state *state) { … } static int hi_command(struct drxk_state *state, u16 cmd, u16 *p_result) { … } static int hi_cfg_command(struct drxk_state *state) { … } static int init_hi(struct drxk_state *state) { … } static int mpegts_configure_pins(struct drxk_state *state, bool mpeg_enable) { … } static int mpegts_disable(struct drxk_state *state) { … } static int bl_chain_cmd(struct drxk_state *state, u16 rom_offset, u16 nr_of_elements, u32 time_out) { … } static int download_microcode(struct drxk_state *state, const u8 p_mc_image[], u32 length) { … } static int dvbt_enable_ofdm_token_ring(struct drxk_state *state, bool enable) { … } static int mpegts_stop(struct drxk_state *state) { … } static int scu_command(struct drxk_state *state, u16 cmd, u8 parameter_len, u16 *parameter, u8 result_len, u16 *result) { … } static int set_iqm_af(struct drxk_state *state, bool active) { … } static int ctrl_power_mode(struct drxk_state *state, enum drx_power_mode *mode) { … } static int power_down_dvbt(struct drxk_state *state, bool set_power_mode) { … } static int setoperation_mode(struct drxk_state *state, enum operation_mode o_mode) { … } static int start(struct drxk_state *state, s32 offset_freq, s32 intermediate_frequency) { … } static int shut_down(struct drxk_state *state) { … } static int get_lock_status(struct drxk_state *state, u32 *p_lock_status) { … } static int mpegts_start(struct drxk_state *state) { … } static int mpegts_dto_init(struct drxk_state *state) { … } static int mpegts_dto_setup(struct drxk_state *state, enum operation_mode o_mode) { … } static int mpegts_configure_polarity(struct drxk_state *state) { … } #define SCU_RAM_AGC_KI_INV_RF_POL__M … static int set_agc_rf(struct drxk_state *state, struct s_cfg_agc *p_agc_cfg, bool is_dtv) { … } #define SCU_RAM_AGC_KI_INV_IF_POL__M … static int set_agc_if(struct drxk_state *state, struct s_cfg_agc *p_agc_cfg, bool is_dtv) { … } static int get_qam_signal_to_noise(struct drxk_state *state, s32 *p_signal_to_noise) { … } static int get_dvbt_signal_to_noise(struct drxk_state *state, s32 *p_signal_to_noise) { … } static int get_signal_to_noise(struct drxk_state *state, s32 *p_signal_to_noise) { … } #if 0 static int get_dvbt_quality(struct drxk_state *state, s32 *p_quality) { /* SNR Values for quasi errorfree reception rom Nordig 2.2 */ int status = 0; dprintk(1, "\n"); static s32 QE_SN[] = { 51, /* QPSK 1/2 */ 69, /* QPSK 2/3 */ 79, /* QPSK 3/4 */ 89, /* QPSK 5/6 */ 97, /* QPSK 7/8 */ 108, /* 16-QAM 1/2 */ 131, /* 16-QAM 2/3 */ 146, /* 16-QAM 3/4 */ 156, /* 16-QAM 5/6 */ 160, /* 16-QAM 7/8 */ 165, /* 64-QAM 1/2 */ 187, /* 64-QAM 2/3 */ 202, /* 64-QAM 3/4 */ 216, /* 64-QAM 5/6 */ 225, /* 64-QAM 7/8 */ }; *p_quality = 0; do { s32 signal_to_noise = 0; u16 constellation = 0; u16 code_rate = 0; u32 signal_to_noise_rel; u32 ber_quality; status = get_dvbt_signal_to_noise(state, &signal_to_noise); if (status < 0) break; status = read16(state, OFDM_EQ_TOP_TD_TPS_CONST__A, &constellation); if (status < 0) break; constellation &= OFDM_EQ_TOP_TD_TPS_CONST__M; status = read16(state, OFDM_EQ_TOP_TD_TPS_CODE_HP__A, &code_rate); if (status < 0) break; code_rate &= OFDM_EQ_TOP_TD_TPS_CODE_HP__M; if (constellation > OFDM_EQ_TOP_TD_TPS_CONST_64QAM || code_rate > OFDM_EQ_TOP_TD_TPS_CODE_LP_7_8) break; signal_to_noise_rel = signal_to_noise - QE_SN[constellation * 5 + code_rate]; ber_quality = 100; if (signal_to_noise_rel < -70) *p_quality = 0; else if (signal_to_noise_rel < 30) *p_quality = ((signal_to_noise_rel + 70) * ber_quality) / 100; else *p_quality = ber_quality; } while (0); return 0; }; static int get_dvbc_quality(struct drxk_state *state, s32 *p_quality) { int status = 0; *p_quality = 0; dprintk(1, "\n"); do { u32 signal_to_noise = 0; u32 ber_quality = 100; u32 signal_to_noise_rel = 0; status = get_qam_signal_to_noise(state, &signal_to_noise); if (status < 0) break; switch (state->props.modulation) { case QAM_16: signal_to_noise_rel = signal_to_noise - 200; break; case QAM_32: signal_to_noise_rel = signal_to_noise - 230; break; /* Not in NorDig */ case QAM_64: signal_to_noise_rel = signal_to_noise - 260; break; case QAM_128: signal_to_noise_rel = signal_to_noise - 290; break; default: case QAM_256: signal_to_noise_rel = signal_to_noise - 320; break; } if (signal_to_noise_rel < -70) *p_quality = 0; else if (signal_to_noise_rel < 30) *p_quality = ((signal_to_noise_rel + 70) * ber_quality) / 100; else *p_quality = ber_quality; } while (0); return status; } static int get_quality(struct drxk_state *state, s32 *p_quality) { dprintk(1, "\n"); switch (state->m_operation_mode) { case OM_DVBT: return get_dvbt_quality(state, p_quality); case OM_QAM_ITU_A: return get_dvbc_quality(state, p_quality); default: break; } return 0; } #endif /* Free data ram in SIO HI */ #define SIO_HI_RA_RAM_USR_BEGIN__A … #define SIO_HI_RA_RAM_USR_END__A … #define DRXK_HI_ATOMIC_BUF_START … #define DRXK_HI_ATOMIC_BUF_END … #define DRXK_HI_ATOMIC_READ … #define DRXK_HI_ATOMIC_WRITE … #define DRXDAP_FASI_ADDR2BLOCK(addr) … #define DRXDAP_FASI_ADDR2BANK(addr) … #define DRXDAP_FASI_ADDR2OFFSET(addr) … static int ConfigureI2CBridge(struct drxk_state *state, bool b_enable_bridge) { … } static int set_pre_saw(struct drxk_state *state, struct s_cfg_pre_saw *p_pre_saw_cfg) { … } static int bl_direct_cmd(struct drxk_state *state, u32 target_addr, u16 rom_offset, u16 nr_of_elements, u32 time_out) { … } static int adc_sync_measurement(struct drxk_state *state, u16 *count) { … } static int adc_synchronization(struct drxk_state *state) { … } static int set_frequency_shifter(struct drxk_state *state, u16 intermediate_freqk_hz, s32 tuner_freq_offset, bool is_dtv) { … } static int init_agc(struct drxk_state *state, bool is_dtv) { … } static int dvbtqam_get_acc_pkt_err(struct drxk_state *state, u16 *packet_err) { … } static int dvbt_sc_command(struct drxk_state *state, u16 cmd, u16 subcmd, u16 param0, u16 param1, u16 param2, u16 param3, u16 param4) { … } static int power_up_dvbt(struct drxk_state *state) { … } static int dvbt_ctrl_set_inc_enable(struct drxk_state *state, bool *enabled) { … } #define DEFAULT_FR_THRES_8K … static int dvbt_ctrl_set_fr_enable(struct drxk_state *state, bool *enabled) { … } static int dvbt_ctrl_set_echo_threshold(struct drxk_state *state, struct drxk_cfg_dvbt_echo_thres_t *echo_thres) { … } static int dvbt_ctrl_set_sqi_speed(struct drxk_state *state, enum drxk_cfg_dvbt_sqi_speed *speed) { … } /*============================================================================*/ /* * \brief Activate DVBT specific presets * \param demod instance of demodulator. * \return DRXStatus_t. * * Called in DVBTSetStandard * */ static int dvbt_activate_presets(struct drxk_state *state) { … } /*============================================================================*/ /* * \brief Initialize channelswitch-independent settings for DVBT. * \param demod instance of demodulator. * \return DRXStatus_t. * * For ROM code channel filter taps are loaded from the bootloader. For microcode * the DVB-T taps from the drxk_filters.h are used. */ static int set_dvbt_standard(struct drxk_state *state, enum operation_mode o_mode) { … } /*============================================================================*/ /* * \brief start dvbt demodulating for channel. * \param demod instance of demodulator. * \return DRXStatus_t. */ static int dvbt_start(struct drxk_state *state) { … } /*============================================================================*/ /* * \brief Set up dvbt demodulator for channel. * \param demod instance of demodulator. * \return DRXStatus_t. * // original DVBTSetChannel() */ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, s32 tuner_freq_offset) { … } /*============================================================================*/ /* * \brief Retrieve lock status . * \param demod Pointer to demodulator instance. * \param lockStat Pointer to lock status structure. * \return DRXStatus_t. * */ static int get_dvbt_lock_status(struct drxk_state *state, u32 *p_lock_status) { … } static int power_up_qam(struct drxk_state *state) { … } /* Power Down QAM */ static int power_down_qam(struct drxk_state *state) { … } /*============================================================================*/ /* * \brief Setup of the QAM Measurement intervals for signal quality * \param demod instance of demod. * \param modulation current modulation. * \return DRXStatus_t. * * NOTE: * Take into account that for certain settings the errorcounters can overflow. * The implementation does not check this. * */ static int set_qam_measurement(struct drxk_state *state, enum e_drxk_constellation modulation, u32 symbol_rate) { … } static int set_qam16(struct drxk_state *state) { … } /*============================================================================*/ /* * \brief QAM32 specific setup * \param demod instance of demod. * \return DRXStatus_t. */ static int set_qam32(struct drxk_state *state) { … } /*============================================================================*/ /* * \brief QAM64 specific setup * \param demod instance of demod. * \return DRXStatus_t. */ static int set_qam64(struct drxk_state *state) { … } /*============================================================================*/ /* * \brief QAM128 specific setup * \param demod: instance of demod. * \return DRXStatus_t. */ static int set_qam128(struct drxk_state *state) { … } /*============================================================================*/ /* * \brief QAM256 specific setup * \param demod: instance of demod. * \return DRXStatus_t. */ static int set_qam256(struct drxk_state *state) { … } /*============================================================================*/ /* * \brief Reset QAM block. * \param demod: instance of demod. * \param channel: pointer to channel data. * \return DRXStatus_t. */ static int qam_reset_qam(struct drxk_state *state) { … } /*============================================================================*/ /* * \brief Set QAM symbolrate. * \param demod: instance of demod. * \param channel: pointer to channel data. * \return DRXStatus_t. */ static int qam_set_symbolrate(struct drxk_state *state) { … } /*============================================================================*/ /* * \brief Get QAM lock status. * \param demod: instance of demod. * \param channel: pointer to channel data. * \return DRXStatus_t. */ static int get_qam_lock_status(struct drxk_state *state, u32 *p_lock_status) { … } #define QAM_MIRROR__M … #define QAM_MIRROR_NORMAL … #define QAM_MIRRORED … #define QAM_MIRROR_AUTO_ON … #define QAM_LOCKRANGE__M … #define QAM_LOCKRANGE_NORMAL … static int qam_demodulator_command(struct drxk_state *state, int number_of_parameters) { … } static int set_qam(struct drxk_state *state, u16 intermediate_freqk_hz, s32 tuner_freq_offset) { … } static int set_qam_standard(struct drxk_state *state, enum operation_mode o_mode) { … } static int write_gpio(struct drxk_state *state) { … } static int switch_antenna_to_qam(struct drxk_state *state) { … } static int switch_antenna_to_dvbt(struct drxk_state *state) { … } static int power_down_device(struct drxk_state *state) { … } static int init_drxk(struct drxk_state *state) { … } static void load_firmware_cb(const struct firmware *fw, void *context) { … } static void drxk_release(struct dvb_frontend *fe) { … } static int drxk_sleep(struct dvb_frontend *fe) { … } static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable) { … } static int drxk_set_parameters(struct dvb_frontend *fe) { … } static int get_strength(struct drxk_state *state, u64 *strength) { … } static int drxk_get_stats(struct dvb_frontend *fe) { … } static int drxk_read_status(struct dvb_frontend *fe, enum fe_status *status) { … } static int drxk_read_signal_strength(struct dvb_frontend *fe, u16 *strength) { … } static int drxk_read_snr(struct dvb_frontend *fe, u16 *snr) { … } static int drxk_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) { … } static int drxk_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *sets) { … } static const struct dvb_frontend_ops drxk_ops = …; struct dvb_frontend *drxk_attach(const struct drxk_config *config, struct i2c_adapter *i2c) { … } EXPORT_SYMBOL_GPL(…); MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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