drxd_hard.c | Explore in Territory

// SPDX-License-Identifier: GPL-2.0-only
/*
 * drxd_hard.c: DVB-T Demodulator Micronas DRX3975D-A2,DRX397xD-B1
 *
 * Copyright (C) 2003-2007 Micronas
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/firmware.h>
#include <linux/i2c.h>
#include <asm/div64.h>

#include <media/dvb_frontend.h>
#include "drxd.h"
#include "drxd_firm.h"

#define DRX_FW_FILENAME_A2 …
#define DRX_FW_FILENAME_B1 …

#define CHUNK_SIZE …

#define DRX_I2C_RMW …
#define DRX_I2C_BROADCAST …
#define DRX_I2C_CLEARCRC …
#define DRX_I2C_SINGLE_MASTER …
#define DRX_I2C_MODEFLAGS …
#define DRX_I2C_FLAGS …

#define DEFAULT_LOCK_TIMEOUT …

#define DRX_CHANNEL_AUTO …
#define DRX_CHANNEL_HIGH …
#define DRX_CHANNEL_LOW …

#define DRX_LOCK_MPEG …
#define DRX_LOCK_FEC …
#define DRX_LOCK_DEMOD …

/****************************************************************************/

enum CSCDState { … };

enum CDrxdState { … };

enum AGC_CTRL_MODE { … };

enum OperationMode { … };

struct SCfgAgc { … };

struct SNoiseCal { … };

enum app_env { … };

enum EIFFilter { … };

struct drxd_state { … };

/****************************************************************************/
/* I2C **********************************************************************/
/****************************************************************************/

static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 * data, int len)
{ … }

static int i2c_read(struct i2c_adapter *adap,
		    u8 adr, u8 *msg, int len, u8 *answ, int alen)
{ … }

static inline u32 MulDiv32(u32 a, u32 b, u32 c)
{ … }

static int Read16(struct drxd_state *state, u32 reg, u16 *data, u8 flags)
{ … }

static int Read32(struct drxd_state *state, u32 reg, u32 *data, u8 flags)
{ … }

static int Write16(struct drxd_state *state, u32 reg, u16 data, u8 flags)
{ … }

static int Write32(struct drxd_state *state, u32 reg, u32 data, u8 flags)
{ … }

static int write_chunk(struct drxd_state *state,
		       u32 reg, u8 *data, u32 len, u8 flags)
{ … }

static int WriteBlock(struct drxd_state *state,
		      u32 Address, u16 BlockSize, u8 *pBlock, u8 Flags)
{ … }

static int WriteTable(struct drxd_state *state, u8 * pTable)
{ … }

/****************************************************************************/
/****************************************************************************/
/****************************************************************************/

static int ResetCEFR(struct drxd_state *state)
{ … }

static int InitCP(struct drxd_state *state)
{ … }

static int InitCE(struct drxd_state *state)
{ … }

static int StopOC(struct drxd_state *state)
{ … }

static int StartOC(struct drxd_state *state)
{ … }

static int InitEQ(struct drxd_state *state)
{ … }

static int InitEC(struct drxd_state *state)
{ … }

static int InitSC(struct drxd_state *state)
{ … }

static int InitAtomicRead(struct drxd_state *state)
{ … }

static int CorrectSysClockDeviation(struct drxd_state *state);

static int DRX_GetLockStatus(struct drxd_state *state, u32 * pLockStatus)
{ … }

/****************************************************************************/

static int SetCfgIfAgc(struct drxd_state *state, struct SCfgAgc *cfg)
{ … }

static int SetCfgRfAgc(struct drxd_state *state, struct SCfgAgc *cfg)
{ … }

static int ReadIFAgc(struct drxd_state *state, u32 * pValue)
{ … }

static int load_firmware(struct drxd_state *state, const char *fw_name)
{ … }

static int DownloadMicrocode(struct drxd_state *state,
			     const u8 *pMCImage, u32 Length)
{ … }

static int HI_Command(struct drxd_state *state, u16 cmd, u16 * pResult)
{ … }

static int HI_CfgCommand(struct drxd_state *state)
{ … }

static int InitHI(struct drxd_state *state)
{ … }

static int HI_ResetCommand(struct drxd_state *state)
{ … }

static int DRX_ConfigureI2CBridge(struct drxd_state *state, int bEnableBridge)
{ … }

#define HI_TR_WRITE …
#define HI_TR_READ …
#define HI_TR_READ_WRITE …
#define HI_TR_BROADCAST …

#if 0
static int AtomicReadBlock(struct drxd_state *state,
			   u32 Addr, u16 DataSize, u8 *pData, u8 Flags)
{
	int status;
	int i = 0;

	/* Parameter check */
	if ((!pData) || ((DataSize & 1) != 0))
		return -1;

	mutex_lock(&state->mutex);

	do {
		/* Instruct HI to read n bytes */
		/* TODO use proper names forthese egisters */
		status = Write16(state, HI_RA_RAM_SRV_CFG_KEY__A, (HI_TR_FUNC_ADDR & 0xFFFF), 0);
		if (status < 0)
			break;
		status = Write16(state, HI_RA_RAM_SRV_CFG_DIV__A, (u16) (Addr >> 16), 0);
		if (status < 0)
			break;
		status = Write16(state, HI_RA_RAM_SRV_CFG_BDL__A, (u16) (Addr & 0xFFFF), 0);
		if (status < 0)
			break;
		status = Write16(state, HI_RA_RAM_SRV_CFG_WUP__A, (u16) ((DataSize / 2) - 1), 0);
		if (status < 0)
			break;
		status = Write16(state, HI_RA_RAM_SRV_CFG_ACT__A, HI_TR_READ, 0);
		if (status < 0)
			break;

		status = HI_Command(state, HI_RA_RAM_SRV_CMD_EXECUTE, 0);
		if (status < 0)
			break;

	} while (0);

	if (status >= 0) {
		for (i = 0; i < (DataSize / 2); i += 1) {
			u16 word;

			status = Read16(state, (HI_RA_RAM_USR_BEGIN__A + i),
					&word, 0);
			if (status < 0)
				break;
			pData[2 * i] = (u8) (word & 0xFF);
			pData[(2 * i) + 1] = (u8) (word >> 8);
		}
	}
	mutex_unlock(&state->mutex);
	return status;
}

static int AtomicReadReg32(struct drxd_state *state,
			   u32 Addr, u32 *pData, u8 Flags)
{
	u8 buf[sizeof(u32)];
	int status;

	if (!pData)
		return -1;
	status = AtomicReadBlock(state, Addr, sizeof(u32), buf, Flags);
	*pData = (((u32) buf[0]) << 0) +
	    (((u32) buf[1]) << 8) +
	    (((u32) buf[2]) << 16) + (((u32) buf[3]) << 24);
	return status;
}
#endif

static int StopAllProcessors(struct drxd_state *state)
{ … }

static int EnableAndResetMB(struct drxd_state *state)
{ … }

static int InitCC(struct drxd_state *state)
{ … }

static int ResetECOD(struct drxd_state *state)
{ … }

/* Configure PGA switch */

static int SetCfgPga(struct drxd_state *state, int pgaSwitch)
{ … }

static int InitFE(struct drxd_state *state)
{ … }

static int InitFT(struct drxd_state *state)
{ … }

static int SC_WaitForReady(struct drxd_state *state)
{ … }

static int SC_SendCommand(struct drxd_state *state, u16 cmd)
{ … }

static int SC_ProcStartCommand(struct drxd_state *state,
			       u16 subCmd, u16 param0, u16 param1)
{ … }

static int SC_SetPrefParamCommand(struct drxd_state *state,
				  u16 subCmd, u16 param0, u16 param1)
{ … }

#if 0
static int SC_GetOpParamCommand(struct drxd_state *state, u16 * result)
{
	int status = 0;

	mutex_lock(&state->mutex);
	do {
		status = SC_WaitForReady(state);
		if (status < 0)
			break;
		status = SC_SendCommand(state, SC_RA_RAM_CMD_GET_OP_PARAM);
		if (status < 0)
			break;
		status = Read16(state, SC_RA_RAM_PARAM0__A, result, 0);
		if (status < 0)
			break;
	} while (0);
	mutex_unlock(&state->mutex);
	return status;
}
#endif

static int ConfigureMPEGOutput(struct drxd_state *state, int bEnableOutput)
{ … }

static int SetDeviceTypeId(struct drxd_state *state)
{ … }

static int CorrectSysClockDeviation(struct drxd_state *state)
{ … }

static int DRX_Stop(struct drxd_state *state)
{ … }

#if 0	/* Currently unused */
static int SetOperationMode(struct drxd_state *state, int oMode)
{
	int status;

	do {
		if (state->drxd_state != DRXD_STOPPED) {
			status = -1;
			break;
		}

		if (oMode == state->operation_mode) {
			status = 0;
			break;
		}

		if (oMode != OM_Default && !state->diversity) {
			status = -1;
			break;
		}

		switch (oMode) {
		case OM_DVBT_Diversity_Front:
			status = WriteTable(state, state->m_InitDiversityFront);
			break;
		case OM_DVBT_Diversity_End:
			status = WriteTable(state, state->m_InitDiversityEnd);
			break;
		case OM_Default:
			/* We need to check how to
			   get DRXD out of diversity */
		default:
			status = WriteTable(state, state->m_DisableDiversity);
			break;
		}
	} while (0);

	if (!status)
		state->operation_mode = oMode;
	return status;
}
#endif

static int StartDiversity(struct drxd_state *state)
{ … }

static int SetFrequencyShift(struct drxd_state *state,
			     u32 offsetFreq, int channelMirrored)
{ … }

static int SetCfgNoiseCalibration(struct drxd_state *state,
				  struct SNoiseCal *noiseCal)
{ … }

static int DRX_Start(struct drxd_state *state, s32 off)
{ … }

static int CDRXD(struct drxd_state *state, u32 IntermediateFrequency)
{ … }

static int DRXD_init(struct drxd_state *state, const u8 *fw, u32 fw_size)
{ … }

static int DRXD_status(struct drxd_state *state, u32 *pLockStatus)
{ … }

/****************************************************************************/
/****************************************************************************/
/****************************************************************************/

static int drxd_read_signal_strength(struct dvb_frontend *fe, u16 * strength)
{ … }

static int drxd_read_status(struct dvb_frontend *fe, enum fe_status *status)
{ … }

static int drxd_init(struct dvb_frontend *fe)
{ … }

static int drxd_config_i2c(struct dvb_frontend *fe, int onoff)
{ … }

static int drxd_get_tune_settings(struct dvb_frontend *fe,
				  struct dvb_frontend_tune_settings *sets)
{ … }

static int drxd_read_ber(struct dvb_frontend *fe, u32 * ber)
{ … }

static int drxd_read_snr(struct dvb_frontend *fe, u16 * snr)
{ … }

static int drxd_read_ucblocks(struct dvb_frontend *fe, u32 * ucblocks)
{ … }

static int drxd_sleep(struct dvb_frontend *fe)
{ … }

static int drxd_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
{ … }

static int drxd_set_frontend(struct dvb_frontend *fe)
{ … }

static void drxd_release(struct dvb_frontend *fe)
{ … }

static const struct dvb_frontend_ops drxd_ops = …;

struct dvb_frontend *drxd_attach(const struct drxd_config *config,
				 void *priv, struct i2c_adapter *i2c,
				 struct device *dev)
{ … }
EXPORT_SYMBOL_GPL(…);

MODULE_DESCRIPTION(…) …;
MODULE_AUTHOR(…) …;
MODULE_LICENSE(…) …;
linux/drivers/media/dvb-frontends/drxd_hard.c
