linux/drivers/media/dvb-frontends/mn88443x.c

// SPDX-License-Identifier: GPL-2.0
//
// Socionext MN88443x series demodulator driver for ISDB-S/ISDB-T.
//
// Copyright (c) 2018 Socionext Inc.

#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/of.h>
#include <linux/regmap.h>
#include <linux/int_log.h>

#include "mn88443x.h"

/* ISDB-S registers */
#define ATSIDU_S
#define ATSIDL_S
#define TSSET_S
#define AGCREAD_S
#define CPMON1_S
#define CPMON1_S_FSYNC
#define CPMON1_S_ERRMON
#define CPMON1_S_SIGOFF
#define CPMON1_S_W2LOCK
#define CPMON1_S_W1LOCK
#define CPMON1_S_DW1LOCK
#define TRMON_S
#define BERCNFLG_S
#define BERCNFLG_S_BERVRDY
#define BERCNFLG_S_BERVCHK
#define BERCNFLG_S_BERDRDY
#define BERCNFLG_S_BERDCHK
#define CNRDXU_S
#define CNRDXL_S
#define CNRDYU_S
#define CNRDYL_S
#define BERVRDU_S
#define BERVRDL_S
#define DOSET1_S

/* Primary ISDB-T */
#define PLLASET1
#define PLLASET2
#define PLLBSET1
#define PLLBSET2
#define PLLSET
#define OUTCSET
#define OUTCSET_CHDRV_8MA
#define OUTCSET_CHDRV_4MA
#define PLDWSET
#define PLDWSET_NORMAL
#define PLDWSET_PULLDOWN
#define HIZSET1
#define HIZSET2

/* Secondary ISDB-T (for MN884434 only) */
#define RCVSET
#define TSSET1_M
#define TSSET2_M
#define TSSET3_M
#define INTACSET
#define HIZSET3

/* ISDB-T registers */
#define TSSET1
#define TSSET1_TSASEL_MASK
#define TSSET1_TSASEL_ISDBT
#define TSSET1_TSASEL_ISDBS
#define TSSET1_TSASEL_NONE
#define TSSET1_TSBSEL_MASK
#define TSSET1_TSBSEL_ISDBS
#define TSSET1_TSBSEL_ISDBT
#define TSSET1_TSBSEL_NONE
#define TSSET2
#define TSSET3
#define TSSET3_INTASEL_MASK
#define TSSET3_INTASEL_T
#define TSSET3_INTASEL_S
#define TSSET3_INTASEL_NONE
#define TSSET3_INTBSEL_MASK
#define TSSET3_INTBSEL_S
#define TSSET3_INTBSEL_T
#define TSSET3_INTBSEL_NONE
#define OUTSET2
#define PWDSET
#define PWDSET_OFDMPD_MASK
#define PWDSET_OFDMPD_DOWN
#define PWDSET_PSKPD_MASK
#define PWDSET_PSKPD_DOWN
#define CLKSET1_T
#define MDSET_T
#define MDSET_T_MDAUTO_MASK
#define MDSET_T_MDAUTO_AUTO
#define MDSET_T_MDAUTO_MANUAL
#define MDSET_T_FFTS_MASK
#define MDSET_T_FFTS_MODE1
#define MDSET_T_FFTS_MODE2
#define MDSET_T_FFTS_MODE3
#define MDSET_T_GI_MASK
#define MDSET_T_GI_1_32
#define MDSET_T_GI_1_16
#define MDSET_T_GI_1_8
#define MDSET_T_GI_1_4
#define MDASET_T
#define ADCSET1_T
#define ADCSET1_T_REFSEL_MASK
#define ADCSET1_T_REFSEL_2V
#define ADCSET1_T_REFSEL_1_5V
#define ADCSET1_T_REFSEL_1V
#define NCOFREQU_T
#define NCOFREQM_T
#define NCOFREQL_T
#define FADU_T
#define FADM_T
#define FADL_T
#define AGCSET2_T
#define AGCSET2_T_IFPOLINV_INC
#define AGCSET2_T_RFPOLINV_INC
#define AGCV3_T
#define MDRD_T
#define MDRD_T_SEGID_MASK
#define MDRD_T_SEGID_13
#define MDRD_T_SEGID_1
#define MDRD_T_SEGID_3
#define MDRD_T_FFTS_MASK
#define MDRD_T_FFTS_MODE1
#define MDRD_T_FFTS_MODE2
#define MDRD_T_FFTS_MODE3
#define MDRD_T_GI_MASK
#define MDRD_T_GI_1_32
#define MDRD_T_GI_1_16
#define MDRD_T_GI_1_8
#define MDRD_T_GI_1_4
#define SSEQRD_T
#define SSEQRD_T_SSEQSTRD_MASK
#define SSEQRD_T_SSEQSTRD_RESET
#define SSEQRD_T_SSEQSTRD_TUNING
#define SSEQRD_T_SSEQSTRD_AGC
#define SSEQRD_T_SSEQSTRD_SEARCH
#define SSEQRD_T_SSEQSTRD_CLOCK_SYNC
#define SSEQRD_T_SSEQSTRD_FREQ_SYNC
#define SSEQRD_T_SSEQSTRD_FRAME_SYNC
#define SSEQRD_T_SSEQSTRD_SYNC
#define SSEQRD_T_SSEQSTRD_LOCK
#define AGCRDU_T
#define AGCRDL_T
#define CNRDU_T
#define CNRDL_T
#define BERFLG_T
#define BERFLG_T_BERDRDY
#define BERFLG_T_BERDCHK
#define BERFLG_T_BERVRDYA
#define BERFLG_T_BERVCHKA
#define BERFLG_T_BERVRDYB
#define BERFLG_T_BERVCHKB
#define BERFLG_T_BERVRDYC
#define BERFLG_T_BERVCHKC
#define BERRDU_T
#define BERRDM_T
#define BERRDL_T
#define BERLENRDU_T
#define BERLENRDL_T
#define ERRFLG_T
#define ERRFLG_T_BERDOVF
#define ERRFLG_T_BERVOVFA
#define ERRFLG_T_BERVOVFB
#define ERRFLG_T_BERVOVFC
#define ERRFLG_T_NERRFA
#define ERRFLG_T_NERRFB
#define ERRFLG_T_NERRFC
#define ERRFLG_T_NERRF
#define DOSET1_T

#define CLK_LOW
#define CLK_DIRECT
#define CLK_MAX

#define S_T_FREQ

struct mn88443x_spec {};

struct mn88443x_priv {};

static int mn88443x_cmn_power_on(struct mn88443x_priv *chip)
{}

static void mn88443x_cmn_power_off(struct mn88443x_priv *chip)
{}

static void mn88443x_s_sleep(struct mn88443x_priv *chip)
{}

static void mn88443x_s_wake(struct mn88443x_priv *chip)
{}

static void mn88443x_s_tune(struct mn88443x_priv *chip,
			    struct dtv_frontend_properties *c)
{}

static int mn88443x_s_read_status(struct mn88443x_priv *chip,
				  struct dtv_frontend_properties *c,
				  enum fe_status *status)
{}

static void mn88443x_t_sleep(struct mn88443x_priv *chip)
{}

static void mn88443x_t_wake(struct mn88443x_priv *chip)
{}

static bool mn88443x_t_is_valid_clk(u32 adckt, u32 if_freq)
{}

static int mn88443x_t_set_freq(struct mn88443x_priv *chip)
{}

static void mn88443x_t_tune(struct mn88443x_priv *chip,
			    struct dtv_frontend_properties *c)
{}

static int mn88443x_t_read_status(struct mn88443x_priv *chip,
				  struct dtv_frontend_properties *c,
				  enum fe_status *status)
{}

static int mn88443x_sleep(struct dvb_frontend *fe)
{}

static int mn88443x_set_frontend(struct dvb_frontend *fe)
{}

static int mn88443x_get_tune_settings(struct dvb_frontend *fe,
				      struct dvb_frontend_tune_settings *s)
{}

static int mn88443x_read_status(struct dvb_frontend *fe, enum fe_status *status)
{}

static const struct dvb_frontend_ops mn88443x_ops =;

static const struct regmap_config regmap_config =;

static int mn88443x_probe(struct i2c_client *client)
{}

static void mn88443x_remove(struct i2c_client *client)
{}

static const struct mn88443x_spec mn88443x_spec_pri =;

static const struct mn88443x_spec mn88443x_spec_sec =;

static const struct of_device_id mn88443x_of_match[] =;
MODULE_DEVICE_TABLE(of, mn88443x_of_match);

static const struct i2c_device_id mn88443x_i2c_id[] =;
MODULE_DEVICE_TABLE(i2c, mn88443x_i2c_id);

static struct i2c_driver mn88443x_driver =;

module_i2c_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();