/* SPDX-License-Identifier: GPL-2.0 */ /* * Defines for the Maxlinear MX58x family of tuners/demods * * Copyright (C) 2014 Digital Devices GmbH * * based on code: * Copyright (c) 2011-2013 MaxLinear, Inc. All rights reserved * which was released under GPL V2 */ enum MXL_BOOL_E { … }; /* Firmware-Host Command IDs */ enum MXL_HYDRA_HOST_CMD_ID_E { … }; #define MXL_ENABLE_BIG_ENDIAN … #define MXL_HYDRA_OEM_MAX_BLOCK_WRITE_LENGTH … #define MXL_HYDRA_OEM_MAX_CMD_BUFF_LEN … #define MXL_HYDRA_CAP_MIN … #define MXL_HYDRA_CAP_MAX … #define MXL_HYDRA_PLID_REG_READ … #define MXL_HYDRA_PLID_REG_WRITE … #define MXL_HYDRA_PLID_CMD_READ … #define MXL_HYDRA_PLID_CMD_WRITE … #define MXL_HYDRA_REG_SIZE_IN_BYTES … #define MXL_HYDRA_I2C_HDR_SIZE … #define MXL_HYDRA_CMD_HEADER_SIZE … #define MXL_HYDRA_SKU_ID_581 … #define MXL_HYDRA_SKU_ID_584 … #define MXL_HYDRA_SKU_ID_585 … #define MXL_HYDRA_SKU_ID_544 … #define MXL_HYDRA_SKU_ID_561 … #define MXL_HYDRA_SKU_ID_582 … #define MXL_HYDRA_SKU_ID_568 … /* macro for register write data buffer size * (PLID + LEN (0xFF) + RegAddr + RegData) */ #define MXL_HYDRA_REG_WRITE_LEN … /* macro to extract a single byte from 4-byte(32-bit) data */ #define GET_BYTE(x, n) … #define MAX_CMD_DATA … #define MXL_GET_REG_MASK_32(lsb_loc, num_of_bits) … #define FW_DL_SIGN … #define MBIN_FORMAT_VERSION … #define MBIN_FILE_HEADER_ID … #define MBIN_SEGMENT_HEADER_ID … #define MBIN_MAX_FILE_LENGTH … struct MBIN_FILE_HEADER_T { … }; struct MBIN_FILE_T { … }; struct MBIN_SEGMENT_HEADER_T { … }; struct MBIN_SEGMENT_T { … }; enum MXL_CMD_TYPE_E { … }; #define BUILD_HYDRA_CMD(cmd_id, req_type, size, data_ptr, cmd_buff) … struct MXL_REG_FIELD_T { … }; struct MXL_DEV_CMD_DATA_T { … }; enum MXL_HYDRA_SKU_TYPE_E { … }; struct MXL_HYDRA_SKU_COMMAND_T { … }; enum MXL_HYDRA_DEMOD_ID_E { … }; #define MXL_DEMOD_SCRAMBLE_SEQ_LEN … #define MAX_STEP_SIZE_24_XTAL_102_05_KHZ … #define MAX_STEP_SIZE_24_XTAL_204_10_KHZ … #define MAX_STEP_SIZE_24_XTAL_306_15_KHZ … #define MAX_STEP_SIZE_24_XTAL_408_20_KHZ … #define MAX_STEP_SIZE_27_XTAL_102_05_KHZ … #define MAX_STEP_SIZE_27_XTAL_204_10_KHZ … #define MAX_STEP_SIZE_27_XTAL_306_15_KHZ … #define MAX_STEP_SIZE_27_XTAL_408_20_KHZ … #define MXL_HYDRA_SPECTRUM_MIN_FREQ_KHZ … #define MXL_HYDRA_SPECTRUM_MAX_FREQ_KHZ … enum MXL_DEMOD_CHAN_PARAMS_OFFSET_E { … }; enum MXL_HYDRA_TUNER_ID_E { … }; enum MXL_HYDRA_BCAST_STD_E { … }; enum MXL_HYDRA_FEC_E { … }; enum MXL_HYDRA_MODULATION_E { … }; enum MXL_HYDRA_SPECTRUM_E { … }; enum MXL_HYDRA_ROLLOFF_E { … }; enum MXL_HYDRA_PILOTS_E { … }; enum MXL_HYDRA_CONSTELLATION_SRC_E { … }; struct MXL_HYDRA_DEMOD_LOCK_T { … }; struct MXL_HYDRA_DEMOD_STATUS_DVBS_T { … }; struct MXL_HYDRA_DEMOD_STATUS_DSS_T { … }; struct MXL_HYDRA_DEMOD_STATUS_DVBS2_T { … }; struct MXL_HYDRA_DEMOD_STATUS_T { … }; struct MXL_HYDRA_DEMOD_SIG_OFFSET_INFO_T { … }; struct MXL_HYDRA_DEMOD_SCRAMBLE_INFO_T { … }; enum MXL_HYDRA_SPECTRUM_STEP_SIZE_E { … }; enum MXL_HYDRA_SPECTRUM_RESOLUTION_E { … }; enum MXL_HYDRA_SPECTRUM_ERROR_CODE_E { … }; struct MXL_HYDRA_SPECTRUM_REQ_T { … }; enum MXL_HYDRA_SEARCH_FREQ_OFFSET_TYPE_E { … }; struct MXL58X_CFG_FREQ_OFF_SEARCH_RANGE_T { … }; /* there are two slices * slice0 - TS0, TS1, TS2 & TS3 * slice1 - TS4, TS5, TS6 & TS7 */ #define MXL_HYDRA_TS_SLICE_MAX … #define MAX_FIXED_PID_NUM … #define MXL_HYDRA_NCO_CLK … #define MXL_HYDRA_MAX_TS_CLOCK … #define MXL_HYDRA_TS_FIXED_PID_FILT_SIZE … #define MXL_HYDRA_SHARED_PID_FILT_SIZE_DEFAULT … #define MXL_HYDRA_SHARED_PID_FILT_SIZE_2_TO_1 … #define MXL_HYDRA_SHARED_PID_FILT_SIZE_4_TO_1 … enum MXL_HYDRA_PID_BANK_TYPE_E { … }; enum MXL_HYDRA_TS_MUX_MODE_E { … }; enum MXL_HYDRA_TS_MUX_TYPE_E { … }; enum MXL_HYDRA_TS_GROUP_E { … }; enum MXL_HYDRA_TS_PID_FLT_CTRL_E { … }; enum MXL_HYDRA_TS_PID_TYPE_E { … }; struct MXL_HYDRA_TS_PID_T { … }; struct MXL_HYDRA_TS_MUX_PREFIX_HEADER_T { … }; enum MXL_HYDRA_PID_FILTER_BANK_E { … }; enum MXL_HYDRA_MPEG_DATA_FMT_E { … }; enum MXL_HYDRA_MPEG_MODE_E { … }; enum MXL_HYDRA_MPEG_CLK_TYPE_E { … }; enum MXL_HYDRA_MPEG_CLK_FMT_E { … }; enum MXL_HYDRA_MPEG_CLK_PHASE_E { … }; enum MXL_HYDRA_MPEG_ERR_INDICATION_E { … }; struct MXL_HYDRA_MPEGOUT_PARAM_T { … }; enum MXL_HYDRA_EXT_TS_IN_ID_E { … }; enum MXL_HYDRA_TS_OUT_ID_E { … }; enum MXL_HYDRA_TS_DRIVE_STRENGTH_E { … }; enum MXL_HYDRA_DEVICE_E { … }; /* Demod IQ data */ struct MXL_HYDRA_DEMOD_IQ_SRC_T { … }; struct MXL_HYDRA_DEMOD_ABORT_TUNE_T { … }; struct MXL_HYDRA_TUNER_CMD { … }; /* Demod Para for Channel Tune */ struct MXL_HYDRA_DEMOD_PARAM_T { … }; struct MXL_HYDRA_DEMOD_SCRAMBLE_CODE_T { … }; struct MXL_INTR_CFG_T { … }; struct MXL_HYDRA_POWER_MODE_CMD { … }; struct MXL_HYDRA_RF_WAKEUP_PARAM_T { … }; struct MXL_HYDRA_RF_WAKEUP_CFG_T { … }; enum MXL_HYDRA_AUX_CTRL_MODE_E { … }; enum MXL_HYDRA_DISEQC_OPMODE_E { … }; enum MXL_HYDRA_DISEQC_VER_E { … }; enum MXL_HYDRA_DISEQC_CARRIER_FREQ_E { … }; enum MXL_HYDRA_DISEQC_ID_E { … }; enum MXL_HYDRA_FSK_OP_MODE_E { … }; struct MXL58X_DSQ_OP_MODE_T { … }; struct MXL_HYDRA_DISEQC_CFG_CONT_TONE_T { … };
Codebase Browser
linux