// SPDX-License-Identifier: GPL-2.0-or-later /* * winbond-cir.c - Driver for the Consumer IR functionality of Winbond * SuperI/O chips. * * Currently supports the Winbond WPCD376i chip (PNP id WEC1022), but * could probably support others (Winbond WEC102X, NatSemi, etc) * with minor modifications. * * Original Author: David Härdeman <[email protected]> * Copyright (C) 2012 Sean Young <[email protected]> * Copyright (C) 2009 - 2011 David Härdeman <[email protected]> * * Dedicated to my daughter Matilda, without whose loving attention this * driver would have been finished in half the time and with a fraction * of the bugs. * * Written using: * o Winbond WPCD376I datasheet helpfully provided by Jesse Barnes at Intel * o NatSemi PC87338/PC97338 datasheet (for the serial port stuff) * o DSDT dumps * * Supported features: * o IR Receive * o IR Transmit * o Wake-On-CIR functionality * o Carrier detection */ #define pr_fmt(fmt) … #include <linux/module.h> #include <linux/pnp.h> #include <linux/interrupt.h> #include <linux/timer.h> #include <linux/leds.h> #include <linux/spinlock.h> #include <linux/pci_ids.h> #include <linux/io.h> #include <linux/bitrev.h> #include <linux/slab.h> #include <linux/wait.h> #include <linux/sched.h> #include <media/rc-core.h> #define DRVNAME … /* CEIR Wake-Up Registers, relative to data->wbase */ #define WBCIR_REG_WCEIR_CTL … #define WBCIR_REG_WCEIR_STS … #define WBCIR_REG_WCEIR_EV_EN … #define WBCIR_REG_WCEIR_CNTL … #define WBCIR_REG_WCEIR_CNTH … #define WBCIR_REG_WCEIR_INDEX … #define WBCIR_REG_WCEIR_DATA … #define WBCIR_REG_WCEIR_CSL … #define WBCIR_REG_WCEIR_CFG1 … #define WBCIR_REG_WCEIR_CFG2 … /* CEIR Enhanced Functionality Registers, relative to data->ebase */ #define WBCIR_REG_ECEIR_CTS … #define WBCIR_REG_ECEIR_CCTL … #define WBCIR_REG_ECEIR_CNT_LO … #define WBCIR_REG_ECEIR_CNT_HI … #define WBCIR_REG_ECEIR_IREM … /* SP3 Banked Registers, relative to data->sbase */ #define WBCIR_REG_SP3_BSR … /* Bank 0 */ #define WBCIR_REG_SP3_RXDATA … #define WBCIR_REG_SP3_TXDATA … #define WBCIR_REG_SP3_IER … #define WBCIR_REG_SP3_EIR … #define WBCIR_REG_SP3_FCR … #define WBCIR_REG_SP3_MCR … #define WBCIR_REG_SP3_LSR … #define WBCIR_REG_SP3_MSR … #define WBCIR_REG_SP3_ASCR … /* Bank 2 */ #define WBCIR_REG_SP3_BGDL … #define WBCIR_REG_SP3_BGDH … #define WBCIR_REG_SP3_EXCR1 … #define WBCIR_REG_SP3_EXCR2 … #define WBCIR_REG_SP3_TXFLV … #define WBCIR_REG_SP3_RXFLV … /* Bank 3 */ #define WBCIR_REG_SP3_MRID … #define WBCIR_REG_SP3_SH_LCR … #define WBCIR_REG_SP3_SH_FCR … /* Bank 4 */ #define WBCIR_REG_SP3_IRCR1 … /* Bank 5 */ #define WBCIR_REG_SP3_IRCR2 … /* Bank 6 */ #define WBCIR_REG_SP3_IRCR3 … #define WBCIR_REG_SP3_SIR_PW … /* Bank 7 */ #define WBCIR_REG_SP3_IRRXDC … #define WBCIR_REG_SP3_IRTXMC … #define WBCIR_REG_SP3_RCCFG … #define WBCIR_REG_SP3_IRCFG1 … #define WBCIR_REG_SP3_IRCFG4 … /* * Magic values follow */ /* No interrupts for WBCIR_REG_SP3_IER and WBCIR_REG_SP3_EIR */ #define WBCIR_IRQ_NONE … /* RX data bit for WBCIR_REG_SP3_IER and WBCIR_REG_SP3_EIR */ #define WBCIR_IRQ_RX … /* TX data low bit for WBCIR_REG_SP3_IER and WBCIR_REG_SP3_EIR */ #define WBCIR_IRQ_TX_LOW … /* Over/Under-flow bit for WBCIR_REG_SP3_IER and WBCIR_REG_SP3_EIR */ #define WBCIR_IRQ_ERR … /* TX data empty bit for WBCEIR_REG_SP3_IER and WBCIR_REG_SP3_EIR */ #define WBCIR_IRQ_TX_EMPTY … /* Led enable/disable bit for WBCIR_REG_ECEIR_CTS */ #define WBCIR_LED_ENABLE … /* RX data available bit for WBCIR_REG_SP3_LSR */ #define WBCIR_RX_AVAIL … /* RX data overrun error bit for WBCIR_REG_SP3_LSR */ #define WBCIR_RX_OVERRUN … /* TX End-Of-Transmission bit for WBCIR_REG_SP3_ASCR */ #define WBCIR_TX_EOT … /* RX disable bit for WBCIR_REG_SP3_ASCR */ #define WBCIR_RX_DISABLE … /* TX data underrun error bit for WBCIR_REG_SP3_ASCR */ #define WBCIR_TX_UNDERRUN … /* Extended mode enable bit for WBCIR_REG_SP3_EXCR1 */ #define WBCIR_EXT_ENABLE … /* Select compare register in WBCIR_REG_WCEIR_INDEX (bits 5 & 6) */ #define WBCIR_REGSEL_COMPARE … /* Select mask register in WBCIR_REG_WCEIR_INDEX (bits 5 & 6) */ #define WBCIR_REGSEL_MASK … /* Starting address of selected register in WBCIR_REG_WCEIR_INDEX */ #define WBCIR_REG_ADDR0 … /* Enable carrier counter */ #define WBCIR_CNTR_EN … /* Reset carrier counter */ #define WBCIR_CNTR_R … /* Invert TX */ #define WBCIR_IRTX_INV … /* Receiver oversampling */ #define WBCIR_RX_T_OV … /* Valid banks for the SP3 UART */ enum wbcir_bank { … }; /* Supported power-on IR Protocols */ enum wbcir_protocol { … }; /* Possible states for IR reception */ enum wbcir_rxstate { … }; /* Possible states for IR transmission */ enum wbcir_txstate { … }; /* Misc */ #define WBCIR_NAME … #define WBCIR_ID_FAMILY … #define WBCIR_ID_CHIP … #define WAKEUP_IOMEM_LEN … #define EHFUNC_IOMEM_LEN … #define SP_IOMEM_LEN … /* Per-device data */ struct wbcir_data { … }; static bool invert; /* default = 0 */ module_param(invert, bool, 0444); MODULE_PARM_DESC(…) …; static bool txandrx; /* default = 0 */ module_param(txandrx, bool, 0444); MODULE_PARM_DESC(…) …; /***************************************************************************** * * UTILITY FUNCTIONS * *****************************************************************************/ /* Caller needs to hold wbcir_lock */ static void wbcir_set_bits(unsigned long addr, u8 bits, u8 mask) { … } /* Selects the register bank for the serial port */ static inline void wbcir_select_bank(struct wbcir_data *data, enum wbcir_bank bank) { … } static inline void wbcir_set_irqmask(struct wbcir_data *data, u8 irqmask) { … } static enum led_brightness wbcir_led_brightness_get(struct led_classdev *led_cdev) { … } static void wbcir_led_brightness_set(struct led_classdev *led_cdev, enum led_brightness brightness) { … } /* Manchester encodes bits to RC6 message cells (see wbcir_shutdown) */ static u8 wbcir_to_rc6cells(u8 val) { … } /***************************************************************************** * * INTERRUPT FUNCTIONS * *****************************************************************************/ static void wbcir_carrier_report(struct wbcir_data *data) { … } static void wbcir_idle_rx(struct rc_dev *dev, bool idle) { … } static void wbcir_irq_rx(struct wbcir_data *data, struct pnp_dev *device) { … } static void wbcir_irq_tx(struct wbcir_data *data) { … } static irqreturn_t wbcir_irq_handler(int irqno, void *cookie) { … } /***************************************************************************** * * RC-CORE INTERFACE FUNCTIONS * *****************************************************************************/ static int wbcir_set_carrier_report(struct rc_dev *dev, int enable) { … } static int wbcir_txcarrier(struct rc_dev *dev, u32 carrier) { … } static int wbcir_txmask(struct rc_dev *dev, u32 mask) { … } static int wbcir_tx(struct rc_dev *dev, unsigned *b, unsigned count) { … } /***************************************************************************** * * SETUP/INIT/SUSPEND/RESUME FUNCTIONS * *****************************************************************************/ static void wbcir_shutdown(struct pnp_dev *device) { … } /* * Wakeup handling is done on shutdown. */ static int wbcir_set_wakeup_filter(struct rc_dev *rc, struct rc_scancode_filter *filter) { … } static int wbcir_suspend(struct pnp_dev *device, pm_message_t state) { … } static void wbcir_init_hw(struct wbcir_data *data) { … } static int wbcir_resume(struct pnp_dev *device) { … } static int wbcir_probe(struct pnp_dev *device, const struct pnp_device_id *dev_id) { … } static void wbcir_remove(struct pnp_dev *device) { … } static const struct pnp_device_id wbcir_ids[] = …; MODULE_DEVICE_TABLE(pnp, wbcir_ids); static struct pnp_driver wbcir_driver = …; static int __init wbcir_init(void) { … } static void __exit wbcir_exit(void) { … } module_init(…) …; module_exit(wbcir_exit); MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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