#define pr_fmt(fmt) …
#include <linux/atomic.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/poll.h>
#include <linux/regmap.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/timer.h>
#include "kcs_bmc_device.h"
#define DEVICE_NAME …
#define KCS_CHANNEL_MAX …
#define LPC_TYIRQX_LOW …
#define LPC_TYIRQX_HIGH …
#define LPC_TYIRQX_RSVD …
#define LPC_TYIRQX_RISING …
#define LPC_HICR0 …
#define LPC_HICR0_LPC3E …
#define LPC_HICR0_LPC2E …
#define LPC_HICR0_LPC1E …
#define LPC_HICR2 …
#define LPC_HICR2_IBFIE3 …
#define LPC_HICR2_IBFIE2 …
#define LPC_HICR2_IBFIE1 …
#define LPC_HICR4 …
#define LPC_HICR4_LADR12AS …
#define LPC_HICR4_KCSENBL …
#define LPC_SIRQCR0 …
#define LPC_SIRQCR0_IRQ12E1 …
#define LPC_SIRQCR0_IRQ1E1 …
#define LPC_HICR5 …
#define LPC_HICR5_ID3IRQX_MASK …
#define LPC_HICR5_ID3IRQX_SHIFT …
#define LPC_HICR5_ID2IRQX_MASK …
#define LPC_HICR5_ID2IRQX_SHIFT …
#define LPC_HICR5_SEL3IRQX …
#define LPC_HICR5_IRQXE3 …
#define LPC_HICR5_SEL2IRQX …
#define LPC_HICR5_IRQXE2 …
#define LPC_LADR3H …
#define LPC_LADR3L …
#define LPC_LADR12H …
#define LPC_LADR12L …
#define LPC_IDR1 …
#define LPC_IDR2 …
#define LPC_IDR3 …
#define LPC_ODR1 …
#define LPC_ODR2 …
#define LPC_ODR3 …
#define LPC_STR1 …
#define LPC_STR2 …
#define LPC_STR3 …
#define LPC_HICRB …
#define LPC_HICRB_EN16LADR2 …
#define LPC_HICRB_EN16LADR1 …
#define LPC_HICRB_IBFIE4 …
#define LPC_HICRB_LPC4E …
#define LPC_HICRC …
#define LPC_HICRC_ID4IRQX_MASK …
#define LPC_HICRC_ID4IRQX_SHIFT …
#define LPC_HICRC_TY4IRQX_MASK …
#define LPC_HICRC_TY4IRQX_SHIFT …
#define LPC_HICRC_OBF4_AUTO_CLR …
#define LPC_HICRC_IRQXE4 …
#define LPC_LADR4 …
#define LPC_IDR4 …
#define LPC_ODR4 …
#define LPC_STR4 …
#define LPC_LSADR12 …
#define LPC_LSADR12_LSADR2_MASK …
#define LPC_LSADR12_LSADR2_SHIFT …
#define LPC_LSADR12_LSADR1_MASK …
#define LPC_LSADR12_LSADR1_SHIFT …
#define OBE_POLL_PERIOD …
enum aspeed_kcs_irq_mode { … };
struct aspeed_kcs_bmc { … };
static inline struct aspeed_kcs_bmc *to_aspeed_kcs_bmc(struct kcs_bmc_device *kcs_bmc)
{ … }
static u8 aspeed_kcs_inb(struct kcs_bmc_device *kcs_bmc, u32 reg)
{ … }
static void aspeed_kcs_outb(struct kcs_bmc_device *kcs_bmc, u32 reg, u8 data)
{ … }
static void aspeed_kcs_updateb(struct kcs_bmc_device *kcs_bmc, u32 reg, u8 mask, u8 val)
{ … }
static int aspeed_kcs_set_address(struct kcs_bmc_device *kcs_bmc, u32 addrs[2], int nr_addrs)
{ … }
static inline int aspeed_kcs_map_serirq_type(u32 dt_type)
{ … }
static int aspeed_kcs_config_upstream_irq(struct aspeed_kcs_bmc *priv, u32 id, u32 dt_type)
{ … }
static void aspeed_kcs_enable_channel(struct kcs_bmc_device *kcs_bmc, bool enable)
{ … }
static void aspeed_kcs_check_obe(struct timer_list *timer)
{ … }
static void aspeed_kcs_irq_mask_update(struct kcs_bmc_device *kcs_bmc, u8 mask, u8 state)
{ … }
static const struct kcs_bmc_device_ops aspeed_kcs_ops = …;
static irqreturn_t aspeed_kcs_irq(int irq, void *arg)
{ … }
static int aspeed_kcs_config_downstream_irq(struct kcs_bmc_device *kcs_bmc,
struct platform_device *pdev)
{ … }
static const struct kcs_ioreg ast_kcs_bmc_ioregs[KCS_CHANNEL_MAX] = …;
static int aspeed_kcs_of_get_channel(struct platform_device *pdev)
{ … }
static int
aspeed_kcs_of_get_io_address(struct platform_device *pdev, u32 addrs[2])
{ … }
static int aspeed_kcs_probe(struct platform_device *pdev)
{ … }
static void aspeed_kcs_remove(struct platform_device *pdev)
{ … }
static const struct of_device_id ast_kcs_bmc_match[] = …;
MODULE_DEVICE_TABLE(of, ast_kcs_bmc_match);
static struct platform_driver ast_kcs_bmc_driver = …;
module_platform_driver(…) …;
MODULE_LICENSE(…) …;
MODULE_AUTHOR(…) …;
MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;