/* SPDX-License-Identifier: GPL-2.0 */ /* * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver * * Copyright 2018-2019 NXP */ #ifndef _MXC_JPEG_HW_H #define _MXC_JPEG_HW_H /* JPEG Decoder/Encoder Wrapper Register Map */ #define GLB_CTRL … #define COM_STATUS … #define BUF_BASE0 … #define BUF_BASE1 … #define LINE_PITCH … #define STM_BUFBASE … #define STM_BUFSIZE … #define IMGSIZE … #define STM_CTRL … /* CAST JPEG-Decoder/Encoder Status Register Map (read-only)*/ #define CAST_STATUS0 … #define CAST_STATUS1 … #define CAST_STATUS2 … #define CAST_STATUS3 … #define CAST_STATUS4 … #define CAST_STATUS5 … #define CAST_STATUS6 … #define CAST_STATUS7 … #define CAST_STATUS8 … #define CAST_STATUS9 … #define CAST_STATUS10 … #define CAST_STATUS11 … #define CAST_STATUS12 … #define CAST_STATUS13 … /* the following are for encoder only */ #define CAST_STATUS14 … #define CAST_STATUS15 … #define CAST_STATUS16 … #define CAST_STATUS17 … #define CAST_STATUS18 … #define CAST_STATUS19 … /* CAST JPEG-Decoder Control Register Map (write-only) */ #define CAST_CTRL … /* CAST JPEG-Encoder Control Register Map (write-only) */ #define CAST_MODE … #define CAST_CFG_MODE … #define CAST_QUALITY … #define CAST_RSVD … #define CAST_REC_REGS_SEL … #define CAST_LUMTH … #define CAST_CHRTH … #define CAST_NOMFRSIZE_LO … #define CAST_NOMFRSIZE_HI … #define CAST_OFBSIZE_LO … #define CAST_OFBSIZE_HI … /* JPEG-Decoder Wrapper Slot Registers 0..3 */ #define SLOT_BASE … #define SLOT_STATUS … #define SLOT_IRQ_EN … #define SLOT_BUF_PTR … #define SLOT_CUR_DESCPT_PTR … #define SLOT_NXT_DESCPT_PTR … #define MXC_SLOT_OFFSET(slot, offset) … /* GLB_CTRL fields */ #define GLB_CTRL_JPG_EN … #define GLB_CTRL_SFT_RST … #define GLB_CTRL_DEC_GO … #define GLB_CTRL_L_ENDIAN(le) … #define GLB_CTRL_SLOT_EN(slot) … /* COM_STAUS fields */ #define COM_STATUS_DEC_ONGOING(r) … #define COM_STATUS_CUR_SLOT(r) … /* STM_CTRL fields */ #define STM_CTRL_PIXEL_PRECISION … #define STM_CTRL_IMAGE_FORMAT(img_fmt) … #define STM_CTRL_IMAGE_FORMAT_MASK … #define STM_CTRL_BITBUF_PTR_CLR(clr) … #define STM_CTRL_AUTO_START(go) … #define STM_CTRL_CONFIG_MOD(mod) … /* SLOT_STATUS fields for slots 0..3 */ #define SLOT_STATUS_FRMDONE … #define SLOT_STATUS_ENC_CONFIG_ERR … /* SLOT_IRQ_EN fields TBD */ #define MXC_NXT_DESCPT_EN … #define MXC_DEC_EXIT_IDLE_MODE … /* JPEG-Decoder Wrapper - STM_CTRL Register Fields */ #define MXC_PIXEL_PRECISION(precision) … enum mxc_jpeg_image_format { … }; #include "mxc-jpeg.h" void print_descriptor_info(struct device *dev, struct mxc_jpeg_desc *desc); void print_cast_status(struct device *dev, void __iomem *reg, unsigned int mode); void print_wrapper_info(struct device *dev, void __iomem *reg); void mxc_jpeg_sw_reset(void __iomem *reg); int mxc_jpeg_enable(void __iomem *reg); void mxc_jpeg_enc_mode_conf(struct device *dev, void __iomem *reg, u8 extseq); void mxc_jpeg_enc_mode_go(struct device *dev, void __iomem *reg, u8 extseq); void mxc_jpeg_enc_set_quality(struct device *dev, void __iomem *reg, u8 quality); void mxc_jpeg_dec_mode_go(struct device *dev, void __iomem *reg); void mxc_jpeg_enable_slot(void __iomem *reg, int slot); void mxc_jpeg_set_l_endian(void __iomem *reg, int le); void mxc_jpeg_enable_irq(void __iomem *reg, int slot); void mxc_jpeg_disable_irq(void __iomem *reg, int slot); void mxc_jpeg_set_bufsize(struct mxc_jpeg_desc *desc, u32 bufsize); void mxc_jpeg_set_res(struct mxc_jpeg_desc *desc, u16 w, u16 h); void mxc_jpeg_set_line_pitch(struct mxc_jpeg_desc *desc, u32 line_pitch); void mxc_jpeg_set_desc(u32 desc, void __iomem *reg, int slot); void mxc_jpeg_clr_desc(void __iomem *reg, int slot); #endif
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