// SPDX-License-Identifier: GPL-2.0+ /* * Driver for Renesas R-Car VIN * * Copyright (C) 2016 Renesas Electronics Corp. * Copyright (C) 2011-2013 Renesas Solutions Corp. * Copyright (C) 2013 Cogent Embedded, Inc., <[email protected]> * Copyright (C) 2008 Magnus Damm * * Based on the soc-camera rcar_vin driver */ #include <linux/delay.h> #include <linux/interrupt.h> #include <linux/pm_runtime.h> #include <media/videobuf2-dma-contig.h> #include "rcar-vin.h" /* ----------------------------------------------------------------------------- * HW Functions */ /* Register offsets for R-Car VIN */ #define VNMC_REG … #define VNMS_REG … #define VNFC_REG … #define VNSLPRC_REG … #define VNELPRC_REG … #define VNSPPRC_REG … #define VNEPPRC_REG … #define VNIS_REG … #define VNMB_REG(m) … #define VNIE_REG … #define VNINTS_REG … #define VNSI_REG … #define VNMTC_REG … #define VNDMR_REG … #define VNDMR2_REG … #define VNUVAOF_REG … /* Register offsets specific for Gen2 */ #define VNSLPOC_REG … #define VNELPOC_REG … #define VNSPPOC_REG … #define VNEPPOC_REG … #define VNYS_REG … #define VNXS_REG … #define VNC1A_REG … #define VNC1B_REG … #define VNC1C_REG … #define VNC2A_REG … #define VNC2B_REG … #define VNC2C_REG … #define VNC3A_REG … #define VNC3B_REG … #define VNC3C_REG … #define VNC4A_REG … #define VNC4B_REG … #define VNC4C_REG … #define VNC5A_REG … #define VNC5B_REG … #define VNC5C_REG … #define VNC6A_REG … #define VNC6B_REG … #define VNC6C_REG … #define VNC7A_REG … #define VNC7B_REG … #define VNC7C_REG … #define VNC8A_REG … #define VNC8B_REG … #define VNC8C_REG … /* Register offsets specific for Gen3 */ #define VNCSI_IFMD_REG … #define VNUDS_CTRL_REG … #define VNUDS_SCALE_REG … #define VNUDS_PASS_BWIDTH_REG … #define VNUDS_CLIP_SIZE_REG … /* Register bit fields for R-Car VIN */ /* Video n Main Control Register bits */ #define VNMC_INF_MASK … #define VNMC_DPINE … #define VNMC_SCLE … #define VNMC_FOC … #define VNMC_YCAL … #define VNMC_INF_YUV8_BT656 … #define VNMC_INF_YUV8_BT601 … #define VNMC_INF_YUV10_BT656 … #define VNMC_INF_YUV10_BT601 … #define VNMC_INF_RAW8 … #define VNMC_INF_YUV16 … #define VNMC_INF_RGB888 … #define VNMC_INF_RGB666 … #define VNMC_VUP … #define VNMC_IM_ODD … #define VNMC_IM_ODD_EVEN … #define VNMC_IM_EVEN … #define VNMC_IM_FULL … #define VNMC_BPS … #define VNMC_ME … /* Video n Module Status Register bits */ #define VNMS_FBS_MASK … #define VNMS_FBS_SHIFT … #define VNMS_FS … #define VNMS_AV … #define VNMS_CA … /* Video n Frame Capture Register bits */ #define VNFC_C_FRAME … #define VNFC_S_FRAME … /* Video n Interrupt Enable Register bits */ #define VNIE_FIE … #define VNIE_EFE … /* Video n Interrupt Status Register bits */ #define VNINTS_FIS … /* Video n Data Mode Register bits */ #define VNDMR_A8BIT(n) … #define VNDMR_A8BIT_MASK … #define VNDMR_YMODE_Y8 … #define VNDMR_EXRGB … #define VNDMR_BPSM … #define VNDMR_ABIT … #define VNDMR_DTMD_YCSEP … #define VNDMR_DTMD_ARGB … #define VNDMR_DTMD_YCSEP_420 … /* Video n Data Mode Register 2 bits */ #define VNDMR2_VPS … #define VNDMR2_HPS … #define VNDMR2_CES … #define VNDMR2_YDS … #define VNDMR2_FTEV … #define VNDMR2_VLV(n) … /* Video n CSI2 Interface Mode Register (Gen3) */ #define VNCSI_IFMD_DES1 … #define VNCSI_IFMD_DES0 … #define VNCSI_IFMD_CSI_CHSEL(n) … /* Video n scaling control register (Gen3) */ #define VNUDS_CTRL_AMD … struct rvin_buffer { … }; #define to_buf_list(vb2_buffer) … static void rvin_write(struct rvin_dev *vin, u32 value, u32 offset) { … } static u32 rvin_read(struct rvin_dev *vin, u32 offset) { … } /* ----------------------------------------------------------------------------- * Crop and Scaling */ static bool rvin_scaler_needed(const struct rvin_dev *vin) { … } struct vin_coeff { … }; static const struct vin_coeff vin_coeff_set[] = …; static void rvin_set_coeff(struct rvin_dev *vin, unsigned short xs) { … } void rvin_scaler_gen2(struct rvin_dev *vin) { … } static unsigned int rvin_uds_scale_ratio(unsigned int in, unsigned int out) { … } static unsigned int rvin_uds_filter_width(unsigned int ratio) { … } void rvin_scaler_gen3(struct rvin_dev *vin) { … } void rvin_crop_scale_comp(struct rvin_dev *vin) { … } /* ----------------------------------------------------------------------------- * Hardware setup */ static int rvin_setup(struct rvin_dev *vin) { … } static void rvin_disable_interrupts(struct rvin_dev *vin) { … } static u32 rvin_get_interrupt_status(struct rvin_dev *vin) { … } static void rvin_ack_interrupt(struct rvin_dev *vin) { … } static bool rvin_capture_active(struct rvin_dev *vin) { … } static enum v4l2_field rvin_get_active_field(struct rvin_dev *vin, u32 vnms) { … } static void rvin_set_slot_addr(struct rvin_dev *vin, int slot, dma_addr_t addr) { … } /* * Moves a buffer from the queue to the HW slot. If no buffer is * available use the scratch buffer. The scratch buffer is never * returned to userspace, its only function is to enable the capture * loop to keep running. */ static void rvin_fill_hw_slot(struct rvin_dev *vin, int slot) { … } static int rvin_capture_start(struct rvin_dev *vin) { … } static void rvin_capture_stop(struct rvin_dev *vin) { … } /* ----------------------------------------------------------------------------- * DMA Functions */ #define RVIN_TIMEOUT_MS … #define RVIN_RETRIES … static irqreturn_t rvin_irq(int irq, void *data) { … } static void return_unused_buffers(struct rvin_dev *vin, enum vb2_buffer_state state) { … } static int rvin_queue_setup(struct vb2_queue *vq, unsigned int *nbuffers, unsigned int *nplanes, unsigned int sizes[], struct device *alloc_devs[]) { struct rvin_dev *vin = vb2_get_drv_priv(vq); /* Make sure the image size is large enough. */ if (*nplanes) return sizes[0] < vin->format.sizeimage ? -EINVAL : 0; *nplanes = 1; sizes[0] = vin->format.sizeimage; return 0; }; static int rvin_buffer_prepare(struct vb2_buffer *vb) { … } static void rvin_buffer_queue(struct vb2_buffer *vb) { … } static int rvin_mc_validate_format(struct rvin_dev *vin, struct v4l2_subdev *sd, struct media_pad *pad) { … } static int rvin_set_stream(struct rvin_dev *vin, int on) { … } int rvin_start_streaming(struct rvin_dev *vin) { … } static int rvin_start_streaming_vq(struct vb2_queue *vq, unsigned int count) { … } void rvin_stop_streaming(struct rvin_dev *vin) { … } static void rvin_stop_streaming_vq(struct vb2_queue *vq) { … } static const struct vb2_ops rvin_qops = …; void rvin_dma_unregister(struct rvin_dev *vin) { … } int rvin_dma_register(struct rvin_dev *vin, int irq) { … } /* ----------------------------------------------------------------------------- * Gen3 CHSEL manipulation */ /* * There is no need to have locking around changing the routing * as it's only possible to do so when no VIN in the group is * streaming so nothing can race with the VNMC register. */ int rvin_set_channel_routing(struct rvin_dev *vin, u8 chsel) { … } void rvin_set_alpha(struct rvin_dev *vin, unsigned int alpha) { … }
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