/* SPDX-License-Identifier: GPL-2.0+ */ /* * Driver for Renesas RZ/G2L CRU * * Copyright (C) 2022 Renesas Electronics Corp. */ #ifndef __RZG2L_CRU__ #define __RZG2L_CRU__ #include <linux/reset.h> #include <media/v4l2-async.h> #include <media/v4l2-dev.h> #include <media/v4l2-device.h> #include <media/videobuf2-v4l2.h> /* Number of HW buffers */ #define RZG2L_CRU_HW_BUFFER_MAX … #define RZG2L_CRU_HW_BUFFER_DEFAULT … /* Address alignment mask for HW buffers */ #define RZG2L_CRU_HW_BUFFER_MASK … /* Maximum number of CSI2 virtual channels */ #define RZG2L_CRU_CSI2_VCHANNEL … #define RZG2L_CRU_MIN_INPUT_WIDTH … #define RZG2L_CRU_MAX_INPUT_WIDTH … #define RZG2L_CRU_MIN_INPUT_HEIGHT … #define RZG2L_CRU_MAX_INPUT_HEIGHT … /** * enum rzg2l_cru_dma_state - DMA states * @RZG2L_CRU_DMA_STOPPED: No operation in progress * @RZG2L_CRU_DMA_STARTING: Capture starting up * @RZG2L_CRU_DMA_RUNNING: Operation in progress have buffers * @RZG2L_CRU_DMA_STOPPING: Stopping operation */ enum rzg2l_cru_dma_state { … }; struct rzg2l_cru_csi { … }; struct rzg2l_cru_ip { … }; /** * struct rzg2l_cru_dev - Renesas CRU device structure * @dev: (OF) device * @base: device I/O register space remapped to virtual memory * @info: info about CRU instance * * @presetn: CRU_PRESETN reset line * @aresetn: CRU_ARESETN reset line * * @vclk: CRU Main clock * * @image_conv_irq: Holds image conversion interrupt number * * @vdev: V4L2 video device associated with CRU * @v4l2_dev: V4L2 device * @num_buf: Holds the current number of buffers enabled * @notifier: V4L2 asynchronous subdevs notifier * * @ip: Image processing subdev info * @csi: CSI info * @mdev: media device * @mdev_lock: protects the count, notifier and csi members * @pad: media pad for the video device entity * * @lock: protects @queue * @queue: vb2 buffers queue * @scratch: cpu address for scratch buffer * @scratch_phys: physical address of the scratch buffer * * @qlock: protects @queue_buf, @buf_list, @sequence * @state * @queue_buf: Keeps track of buffers given to HW slot * @buf_list: list of queued buffers * @sequence: V4L2 buffers sequence number * @state: keeps track of operation state * * @format: active V4L2 pixel format */ struct rzg2l_cru_dev { … }; int rzg2l_cru_start_image_processing(struct rzg2l_cru_dev *cru); void rzg2l_cru_stop_image_processing(struct rzg2l_cru_dev *cru); int rzg2l_cru_dma_register(struct rzg2l_cru_dev *cru); void rzg2l_cru_dma_unregister(struct rzg2l_cru_dev *cru); int rzg2l_cru_video_register(struct rzg2l_cru_dev *cru); void rzg2l_cru_video_unregister(struct rzg2l_cru_dev *cru); const struct v4l2_format_info *rzg2l_cru_format_from_pixel(u32 format); int rzg2l_cru_ip_subdev_register(struct rzg2l_cru_dev *cru); void rzg2l_cru_ip_subdev_unregister(struct rzg2l_cru_dev *cru); struct v4l2_mbus_framefmt *rzg2l_cru_ip_get_src_fmt(struct rzg2l_cru_dev *cru); #endif
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