// SPDX-License-Identifier: GPL-2.0 /* * Xilinx Video Timing Controller * * Copyright (C) 2013-2015 Ideas on Board * Copyright (C) 2013-2015 Xilinx, Inc. * * Contacts: Hyun Kwon <[email protected]> * Laurent Pinchart <[email protected]> */ #include <linux/clk.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/slab.h> #include "xilinx-vip.h" #include "xilinx-vtc.h" #define XVTC_CONTROL_FIELD_ID_POL_SRC … #define XVTC_CONTROL_ACTIVE_CHROMA_POL_SRC … #define XVTC_CONTROL_ACTIVE_VIDEO_POL_SRC … #define XVTC_CONTROL_HSYNC_POL_SRC … #define XVTC_CONTROL_VSYNC_POL_SRC … #define XVTC_CONTROL_HBLANK_POL_SRC … #define XVTC_CONTROL_VBLANK_POL_SRC … #define XVTC_CONTROL_CHROMA_SRC … #define XVTC_CONTROL_VBLANK_HOFF_SRC … #define XVTC_CONTROL_VSYNC_END_SRC … #define XVTC_CONTROL_VSYNC_START_SRC … #define XVTC_CONTROL_ACTIVE_VSIZE_SRC … #define XVTC_CONTROL_FRAME_VSIZE_SRC … #define XVTC_CONTROL_HSYNC_END_SRC … #define XVTC_CONTROL_HSYNC_START_SRC … #define XVTC_CONTROL_ACTIVE_HSIZE_SRC … #define XVTC_CONTROL_FRAME_HSIZE_SRC … #define XVTC_CONTROL_SYNC_ENABLE … #define XVTC_CONTROL_DET_ENABLE … #define XVTC_CONTROL_GEN_ENABLE … #define XVTC_STATUS_FSYNC(n) … #define XVTC_STATUS_GEN_ACTIVE_VIDEO … #define XVTC_STATUS_GEN_VBLANK … #define XVTC_STATUS_DET_ACTIVE_VIDEO … #define XVTC_STATUS_DET_VBLANK … #define XVTC_STATUS_LOCK_LOSS … #define XVTC_STATUS_LOCK … #define XVTC_ERROR_ACTIVE_CHROMA_LOCK … #define XVTC_ERROR_ACTIVE_VIDEO_LOCK … #define XVTC_ERROR_HSYNC_LOCK … #define XVTC_ERROR_VSYNC_LOCK … #define XVTC_ERROR_HBLANK_LOCK … #define XVTC_ERROR_VBLANK_LOCK … #define XVTC_IRQ_ENABLE_FSYNC(n) … #define XVTC_IRQ_ENABLE_GEN_ACTIVE_VIDEO … #define XVTC_IRQ_ENABLE_GEN_VBLANK … #define XVTC_IRQ_ENABLE_DET_ACTIVE_VIDEO … #define XVTC_IRQ_ENABLE_DET_VBLANK … #define XVTC_IRQ_ENABLE_LOCK_LOSS … #define XVTC_IRQ_ENABLE_LOCK … /* * The following registers exist in two blocks, one at 0x0020 for the detector * and one at 0x0060 for the generator. */ #define XVTC_DETECTOR_OFFSET … #define XVTC_GENERATOR_OFFSET … #define XVTC_ACTIVE_SIZE … #define XVTC_ACTIVE_VSIZE_SHIFT … #define XVTC_ACTIVE_VSIZE_MASK … #define XVTC_ACTIVE_HSIZE_SHIFT … #define XVTC_ACTIVE_HSIZE_MASK … #define XVTC_TIMING_STATUS … #define XVTC_TIMING_STATUS_ACTIVE_VIDEO … #define XVTC_TIMING_STATUS_VBLANK … #define XVTC_TIMING_STATUS_LOCKED … #define XVTC_ENCODING … #define XVTC_ENCODING_CHROMA_PARITY_SHIFT … #define XVTC_ENCODING_CHROMA_PARITY_MASK … #define XVTC_ENCODING_CHROMA_PARITY_EVEN_ALL … #define XVTC_ENCODING_CHROMA_PARITY_ODD_ALL … #define XVTC_ENCODING_CHROMA_PARITY_EVEN_EVEN … #define XVTC_ENCODING_CHROMA_PARITY_ODD_EVEN … #define XVTC_ENCODING_VIDEO_FORMAT_SHIFT … #define XVTC_ENCODING_VIDEO_FORMAT_MASK … #define XVTC_ENCODING_VIDEO_FORMAT_YUV422 … #define XVTC_ENCODING_VIDEO_FORMAT_YUV444 … #define XVTC_ENCODING_VIDEO_FORMAT_RGB … #define XVTC_ENCODING_VIDEO_FORMAT_YUV420 … #define XVTC_POLARITY … #define XVTC_POLARITY_ACTIVE_CHROMA_POL … #define XVTC_POLARITY_ACTIVE_VIDEO_POL … #define XVTC_POLARITY_HSYNC_POL … #define XVTC_POLARITY_VSYNC_POL … #define XVTC_POLARITY_HBLANK_POL … #define XVTC_POLARITY_VBLANK_POL … #define XVTC_HSIZE … #define XVTC_HSIZE_MASK … #define XVTC_VSIZE … #define XVTC_VSIZE_MASK … #define XVTC_HSYNC … #define XVTC_HSYNC_END_SHIFT … #define XVTC_HSYNC_END_MASK … #define XVTC_HSYNC_START_SHIFT … #define XVTC_HSYNC_START_MASK … #define XVTC_F0_VBLANK_H … #define XVTC_F0_VBLANK_HEND_SHIFT … #define XVTC_F0_VBLANK_HEND_MASK … #define XVTC_F0_VBLANK_HSTART_SHIFT … #define XVTC_F0_VBLANK_HSTART_MASK … #define XVTC_F0_VSYNC_V … #define XVTC_F0_VSYNC_VEND_SHIFT … #define XVTC_F0_VSYNC_VEND_MASK … #define XVTC_F0_VSYNC_VSTART_SHIFT … #define XVTC_F0_VSYNC_VSTART_MASK … #define XVTC_F0_VSYNC_H … #define XVTC_F0_VSYNC_HEND_SHIFT … #define XVTC_F0_VSYNC_HEND_MASK … #define XVTC_F0_VSYNC_HSTART_SHIFT … #define XVTC_F0_VSYNC_HSTART_MASK … #define XVTC_FRAME_SYNC_CONFIG(n) … #define XVTC_FRAME_SYNC_V_START_SHIFT … #define XVTC_FRAME_SYNC_V_START_MASK … #define XVTC_FRAME_SYNC_H_START_SHIFT … #define XVTC_FRAME_SYNC_H_START_MASK … #define XVTC_GENERATOR_GLOBAL_DELAY … /** * struct xvtc_device - Xilinx Video Timing Controller device structure * @xvip: Xilinx Video IP device * @list: entry in the global VTC list * @has_detector: the VTC has a timing detector * @has_generator: the VTC has a timing generator * @config: generator timings configuration */ struct xvtc_device { … }; static LIST_HEAD(xvtc_list); static DEFINE_MUTEX(xvtc_lock); static inline void xvtc_gen_write(struct xvtc_device *xvtc, u32 addr, u32 value) { … } /* ----------------------------------------------------------------------------- * Generator Operations */ int xvtc_generator_start(struct xvtc_device *xvtc, const struct xvtc_config *config) { … } EXPORT_SYMBOL_GPL(…); int xvtc_generator_stop(struct xvtc_device *xvtc) { … } EXPORT_SYMBOL_GPL(…); struct xvtc_device *xvtc_of_get(struct device_node *np) { … } EXPORT_SYMBOL_GPL(…); void xvtc_put(struct xvtc_device *xvtc) { … } EXPORT_SYMBOL_GPL(…); /* ----------------------------------------------------------------------------- * Registration and Unregistration */ static void xvtc_register_device(struct xvtc_device *xvtc) { … } static void xvtc_unregister_device(struct xvtc_device *xvtc) { … } /* ----------------------------------------------------------------------------- * Platform Device Driver */ static int xvtc_parse_of(struct xvtc_device *xvtc) { … } static int xvtc_probe(struct platform_device *pdev) { … } static void xvtc_remove(struct platform_device *pdev) { … } static const struct of_device_id xvtc_of_id_table[] = …; MODULE_DEVICE_TABLE(of, xvtc_of_id_table); static struct platform_driver xvtc_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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