// SPDX-License-Identifier: GPL-2.0 /* * Copyright(c) 2018 Intel Corporation. All rights reserved. * Intel specific definitions for NVDIMM Firmware Interface Table - NFIT */ #ifndef _NFIT_INTEL_H_ #define _NFIT_INTEL_H_ #define ND_INTEL_SMART … #define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID … #define ND_INTEL_SMART_SHUTDOWN_VALID … struct nd_intel_smart { … } __packed; extern const struct nvdimm_security_ops *intel_security_ops; #define ND_INTEL_STATUS_SIZE … #define ND_INTEL_PASSPHRASE_SIZE … #define ND_INTEL_STATUS_NOT_SUPPORTED … #define ND_INTEL_STATUS_RETRY … #define ND_INTEL_STATUS_NOT_READY … #define ND_INTEL_STATUS_INVALID_STATE … #define ND_INTEL_STATUS_INVALID_PASS … #define ND_INTEL_STATUS_OVERWRITE_UNSUPPORTED … #define ND_INTEL_STATUS_OQUERY_INPROGRESS … #define ND_INTEL_STATUS_OQUERY_SEQUENCE_ERR … #define ND_INTEL_SEC_STATE_ENABLED … #define ND_INTEL_SEC_STATE_LOCKED … #define ND_INTEL_SEC_STATE_FROZEN … #define ND_INTEL_SEC_STATE_PLIMIT … #define ND_INTEL_SEC_STATE_UNSUPPORTED … #define ND_INTEL_SEC_STATE_OVERWRITE … #define ND_INTEL_SEC_ESTATE_ENABLED … #define ND_INTEL_SEC_ESTATE_PLIMIT … struct nd_intel_get_security_state { … } __packed; struct nd_intel_set_passphrase { … } __packed; struct nd_intel_unlock_unit { … } __packed; struct nd_intel_disable_passphrase { … } __packed; struct nd_intel_freeze_lock { … } __packed; struct nd_intel_secure_erase { … } __packed; struct nd_intel_overwrite { … } __packed; struct nd_intel_query_overwrite { … } __packed; struct nd_intel_set_master_passphrase { … } __packed; struct nd_intel_master_secure_erase { … } __packed; #define ND_INTEL_FWA_IDLE … #define ND_INTEL_FWA_ARMED … #define ND_INTEL_FWA_BUSY … #define ND_INTEL_DIMM_FWA_NONE … #define ND_INTEL_DIMM_FWA_NOTSTAGED … #define ND_INTEL_DIMM_FWA_SUCCESS … #define ND_INTEL_DIMM_FWA_NEEDRESET … #define ND_INTEL_DIMM_FWA_MEDIAFAILED … #define ND_INTEL_DIMM_FWA_ABORT … #define ND_INTEL_DIMM_FWA_NOTSUPP … #define ND_INTEL_DIMM_FWA_ERROR … struct nd_intel_fw_activate_dimminfo { … } __packed; #define ND_INTEL_DIMM_FWA_ARM … #define ND_INTEL_DIMM_FWA_DISARM … struct nd_intel_fw_activate_arm { … } __packed; /* Root device command payloads */ #define ND_INTEL_BUS_FWA_CAP_FWQUIESCE … #define ND_INTEL_BUS_FWA_CAP_OSQUIESCE … #define ND_INTEL_BUS_FWA_CAP_RESET … struct nd_intel_bus_fw_activate_businfo { … } __packed; #define ND_INTEL_BUS_FWA_STATUS_NOARM … #define ND_INTEL_BUS_FWA_STATUS_BUSY … #define ND_INTEL_BUS_FWA_STATUS_NOFW … #define ND_INTEL_BUS_FWA_STATUS_TMO … #define ND_INTEL_BUS_FWA_STATUS_NOIDLE … #define ND_INTEL_BUS_FWA_STATUS_ABORT … #define ND_INTEL_BUS_FWA_IODEV_FORCE_IDLE … #define ND_INTEL_BUS_FWA_IODEV_OS_IDLE … struct nd_intel_bus_fw_activate { … } __packed; extern const struct nvdimm_fw_ops *intel_fw_ops; extern const struct nvdimm_bus_fw_ops *intel_bus_fw_ops; #endif
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