// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2007,2012 Texas Instruments, Inc. */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/interrupt.h> #include <linux/slab.h> #include <linux/err.h> #include <linux/io.h> #include <linux/sched.h> #include <linux/pm_runtime.h> #include <linux/of.h> #include <linux/w1.h> #define MOD_NAME … #define OMAP_HDQ_REVISION … #define OMAP_HDQ_TX_DATA … #define OMAP_HDQ_RX_DATA … #define OMAP_HDQ_CTRL_STATUS … #define OMAP_HDQ_CTRL_STATUS_SINGLE … #define OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK … #define OMAP_HDQ_CTRL_STATUS_CLOCKENABLE … #define OMAP_HDQ_CTRL_STATUS_GO … #define OMAP_HDQ_CTRL_STATUS_PRESENCE … #define OMAP_HDQ_CTRL_STATUS_INITIALIZATION … #define OMAP_HDQ_CTRL_STATUS_DIR … #define OMAP_HDQ_INT_STATUS … #define OMAP_HDQ_INT_STATUS_TXCOMPLETE … #define OMAP_HDQ_INT_STATUS_RXCOMPLETE … #define OMAP_HDQ_INT_STATUS_TIMEOUT … #define OMAP_HDQ_FLAG_CLEAR … #define OMAP_HDQ_FLAG_SET … #define OMAP_HDQ_TIMEOUT … #define OMAP_HDQ_MAX_USER … static DECLARE_WAIT_QUEUE_HEAD(hdq_wait_queue); static int w1_id; module_param(w1_id, int, 0400); MODULE_PARM_DESC(…) …; struct hdq_data { … }; /* HDQ register I/O routines */ static inline u8 hdq_reg_in(struct hdq_data *hdq_data, u32 offset) { … } static inline void hdq_reg_out(struct hdq_data *hdq_data, u32 offset, u8 val) { … } static inline u8 hdq_reg_merge(struct hdq_data *hdq_data, u32 offset, u8 val, u8 mask) { … } /* * Wait for one or more bits in flag change. * HDQ_FLAG_SET: wait until any bit in the flag is set. * HDQ_FLAG_CLEAR: wait until all bits in the flag are cleared. * return 0 on success and -ETIMEDOUT in the case of timeout. */ static int hdq_wait_for_flag(struct hdq_data *hdq_data, u32 offset, u8 flag, u8 flag_set, u8 *status) { … } /* Clear saved irqstatus after using an interrupt */ static u8 hdq_reset_irqstatus(struct hdq_data *hdq_data, u8 bits) { … } /* write out a byte and fill *status with HDQ_INT_STATUS */ static int hdq_write_byte(struct hdq_data *hdq_data, u8 val, u8 *status) { … } /* HDQ Interrupt service routine */ static irqreturn_t hdq_isr(int irq, void *_hdq) { … } /* W1 search callback function in HDQ mode */ static void omap_w1_search_bus(void *_hdq, struct w1_master *master_dev, u8 search_type, w1_slave_found_callback slave_found) { … } /* Issue break pulse to the device */ static int omap_hdq_break(struct hdq_data *hdq_data) { … } static int hdq_read_byte(struct hdq_data *hdq_data, u8 *val) { … } /* * W1 triplet callback function - used for searching ROM addresses. * Registered only when controller is in 1-wire mode. */ static u8 omap_w1_triplet(void *_hdq, u8 bdir) { … } /* reset callback */ static u8 omap_w1_reset_bus(void *_hdq) { … } /* Read a byte of data from the device */ static u8 omap_w1_read_byte(void *_hdq) { … } /* Write a byte of data to the device */ static void omap_w1_write_byte(void *_hdq, u8 byte) { … } static struct w1_bus_master omap_w1_master = …; static int __maybe_unused omap_hdq_runtime_suspend(struct device *dev) { … } static int __maybe_unused omap_hdq_runtime_resume(struct device *dev) { … } static const struct dev_pm_ops omap_hdq_pm_ops = …; static int omap_hdq_probe(struct platform_device *pdev) { … } static void omap_hdq_remove(struct platform_device *pdev) { … } static const struct of_device_id omap_hdq_dt_ids[] = …; MODULE_DEVICE_TABLE(of, omap_hdq_dt_ids); static struct platform_driver omap_hdq_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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