linux/drivers/thermal/tegra/soctherm.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2014-2016, NVIDIA CORPORATION.  All rights reserved.
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 */

#ifndef __DRIVERS_THERMAL_TEGRA_SOCTHERM_H
#define __DRIVERS_THERMAL_TEGRA_SOCTHERM_H

#define THERMCTL_LEVEL0_GROUP_CPU …
#define THERMCTL_LEVEL0_GROUP_GPU …
#define THERMCTL_LEVEL0_GROUP_MEM …
#define THERMCTL_LEVEL0_GROUP_TSENSE …

#define SENSOR_CONFIG2 …
#define SENSOR_CONFIG2_THERMA_MASK …
#define SENSOR_CONFIG2_THERMA_SHIFT …
#define SENSOR_CONFIG2_THERMB_MASK …
#define SENSOR_CONFIG2_THERMB_SHIFT …

#define THERMCTL_THERMTRIP_CTL …
/* BITs are defined in device file */

#define THERMCTL_INTR_ENABLE …
#define THERMCTL_INTR_DISABLE …
#define TH_INTR_UP_DN_EN …
#define THERM_IRQ_MEM_MASK …
#define THERM_IRQ_GPU_MASK …
#define THERM_IRQ_CPU_MASK …
#define THERM_IRQ_TSENSE_MASK …

#define SENSOR_PDIV …
#define SENSOR_PDIV_CPU_MASK …
#define SENSOR_PDIV_GPU_MASK …
#define SENSOR_PDIV_MEM_MASK …
#define SENSOR_PDIV_PLLX_MASK …

#define SENSOR_HOTSPOT_OFF …
#define SENSOR_HOTSPOT_CPU_MASK …
#define SENSOR_HOTSPOT_GPU_MASK …
#define SENSOR_HOTSPOT_MEM_MASK …

#define SENSOR_TEMP1 …
#define SENSOR_TEMP1_CPU_TEMP_MASK …
#define SENSOR_TEMP1_GPU_TEMP_MASK …
#define SENSOR_TEMP2 …
#define SENSOR_TEMP2_MEM_TEMP_MASK …
#define SENSOR_TEMP2_PLLX_TEMP_MASK …

/**
 * struct tegra_tsensor_group - SOC_THERM sensor group data
 * @name: short name of the temperature sensor group
 * @id: numeric ID of the temperature sensor group
 * @sensor_temp_offset: offset of the SENSOR_TEMP* register
 * @sensor_temp_mask: bit mask for this sensor group in SENSOR_TEMP* register
 * @pdiv: the sensor count post-divider to use during runtime
 * @pdiv_ate: the sensor count post-divider used during automated test
 * @pdiv_mask: register bitfield mask for the PDIV field for this sensor
 * @pllx_hotspot_diff: hotspot offset from the PLLX sensor, must be 0 for
    PLLX sensor group
 * @pllx_hotspot_mask: register bitfield mask for the HOTSPOT field
 */
struct tegra_tsensor_group { … };

struct tegra_tsensor_configuration { … };

struct tegra_tsensor { … };

struct tsensor_group_thermtrips { … };

struct tegra_soctherm_fuse { … };

struct tsensor_shared_calib { … };

struct tegra_soctherm_soc { … };

int tegra_calc_shared_calib(const struct tegra_soctherm_fuse *tfuse,
			    struct tsensor_shared_calib *shared);
int tegra_calc_tsensor_calib(const struct tegra_tsensor *sensor,
			     const struct tsensor_shared_calib *shared,
			     u32 *calib);

#ifdef CONFIG_ARCH_TEGRA_124_SOC
extern const struct tegra_soctherm_soc tegra124_soctherm;
#endif

#ifdef CONFIG_ARCH_TEGRA_132_SOC
extern const struct tegra_soctherm_soc tegra132_soctherm;
#endif

#ifdef CONFIG_ARCH_TEGRA_210_SOC
extern const struct tegra_soctherm_soc tegra210_soctherm;
#endif

#endif