// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2020 Linaro Limited * * Based on original driver: * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. * * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/bitfield.h> #include <linux/iio/adc/qcom-vadc-common.h> #include <linux/iio/consumer.h> #include <linux/interrupt.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/thermal.h> #include <linux/unaligned.h> #include "../thermal_hwmon.h" /* * Thermal monitoring block consists of 8 (ADC_TM5_NUM_CHANNELS) channels. Each * channel is programmed to use one of ADC channels for voltage comparison. * Voltages are programmed using ADC codes, so we have to convert temp to * voltage and then to ADC code value. * * Configuration of TM channels must match configuration of corresponding ADC * channels. */ #define ADC5_MAX_CHANNEL … #define ADC_TM5_NUM_CHANNELS … #define ADC_TM5_STATUS_LOW … #define ADC_TM5_STATUS_HIGH … #define ADC_TM5_NUM_BTM … #define ADC_TM5_ADC_DIG_PARAM … #define ADC_TM5_FAST_AVG_CTL … #define ADC_TM5_FAST_AVG_EN … #define ADC_TM5_MEAS_INTERVAL_CTL … #define ADC_TM5_TIMER1 … #define ADC_TM5_MEAS_INTERVAL_CTL2 … #define ADC_TM5_MEAS_INTERVAL_CTL2_MASK … #define ADC_TM5_TIMER2 … #define ADC_TM5_MEAS_INTERVAL_CTL3_MASK … #define ADC_TM5_TIMER3 … #define ADC_TM_EN_CTL1 … #define ADC_TM_EN … #define ADC_TM_CONV_REQ … #define ADC_TM_CONV_REQ_EN … #define ADC_TM5_M_CHAN_BASE … #define ADC_TM5_M_ADC_CH_SEL_CTL(n) … #define ADC_TM5_M_LOW_THR0(n) … #define ADC_TM5_M_LOW_THR1(n) … #define ADC_TM5_M_HIGH_THR0(n) … #define ADC_TM5_M_HIGH_THR1(n) … #define ADC_TM5_M_MEAS_INTERVAL_CTL(n) … #define ADC_TM5_M_CTL(n) … #define ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK … #define ADC_TM5_M_CTL_CAL_SEL_MASK … #define ADC_TM5_M_CTL_CAL_VAL … #define ADC_TM5_M_EN(n) … #define ADC_TM5_M_MEAS_EN … #define ADC_TM5_M_HIGH_THR_INT_EN … #define ADC_TM5_M_LOW_THR_INT_EN … #define ADC_TM_GEN2_STATUS1 … #define ADC_TM_GEN2_STATUS_LOW_SET … #define ADC_TM_GEN2_STATUS_LOW_CLR … #define ADC_TM_GEN2_STATUS_HIGH_SET … #define ADC_TM_GEN2_STATUS_HIGH_CLR … #define ADC_TM_GEN2_CFG_HS_SET … #define ADC_TM_GEN2_CFG_HS_FLAG … #define ADC_TM_GEN2_CFG_HS_CLR … #define ADC_TM_GEN2_SID … #define ADC_TM_GEN2_CH_CTL … #define ADC_TM_GEN2_TM_CH_SEL … #define ADC_TM_GEN2_MEAS_INT_SEL … #define ADC_TM_GEN2_ADC_DIG_PARAM … #define ADC_TM_GEN2_CTL_CAL_SEL … #define ADC_TM_GEN2_CTL_DEC_RATIO_MASK … #define ADC_TM_GEN2_FAST_AVG_CTL … #define ADC_TM_GEN2_FAST_AVG_EN … #define ADC_TM_GEN2_ADC_CH_SEL_CTL … #define ADC_TM_GEN2_DELAY_CTL … #define ADC_TM_GEN2_HW_SETTLE_DELAY … #define ADC_TM_GEN2_EN_CTL1 … #define ADC_TM_GEN2_EN … #define ADC_TM_GEN2_CONV_REQ … #define ADC_TM_GEN2_CONV_REQ_EN … #define ADC_TM_GEN2_LOW_THR0 … #define ADC_TM_GEN2_LOW_THR1 … #define ADC_TM_GEN2_HIGH_THR0 … #define ADC_TM_GEN2_HIGH_THR1 … #define ADC_TM_GEN2_LOWER_MASK(n) … #define ADC_TM_GEN2_UPPER_MASK(n) … #define ADC_TM_GEN2_MEAS_IRQ_EN … #define ADC_TM_GEN2_MEAS_EN … #define ADC_TM5_GEN2_HIGH_THR_INT_EN … #define ADC_TM5_GEN2_LOW_THR_INT_EN … #define ADC_TM_GEN2_MEAS_INT_LSB … #define ADC_TM_GEN2_MEAS_INT_MSB … #define ADC_TM_GEN2_MEAS_INT_MODE … #define ADC_TM_GEN2_Mn_DATA0(n) … #define ADC_TM_GEN2_Mn_DATA1(n) … #define ADC_TM_GEN2_DATA_SHIFT … enum adc5_timer_select { … }; enum adc5_gen { … }; enum adc_tm5_cal_method { … }; enum adc_tm_gen2_time_select { … }; struct adc_tm5_chip; struct adc_tm5_channel; struct adc_tm5_data { … }; /** * struct adc_tm5_channel - ADC Thermal Monitoring channel data. * @channel: channel number. * @adc_channel: corresponding ADC channel number. * @cal_method: calibration method. * @prescale: channel scaling performed on the input signal. * @hw_settle_time: the time between AMUX being configured and the * start of conversion. * @decimation: sampling rate supported for the channel. * @avg_samples: ability to provide single result from the ADC * that is an average of multiple measurements. * @high_thr_en: channel upper voltage threshold enable state. * @low_thr_en: channel lower voltage threshold enable state. * @meas_en: recurring measurement enable state * @iio: IIO channel instance used by this channel. * @chip: ADC TM chip instance. * @tzd: thermal zone device used by this channel. */ struct adc_tm5_channel { … }; /** * struct adc_tm5_chip - ADC Thermal Monitoring properties * @regmap: SPMI ADC5 Thermal Monitoring peripheral register map field. * @dev: SPMI ADC5 device. * @data: software configuration data. * @channels: array of ADC TM channel data. * @nchannels: amount of channels defined/allocated * @decimation: sampling rate supported for the channel. * Applies to all channels, used only on Gen1 ADC_TM. * @avg_samples: ability to provide single result from the ADC * that is an average of multiple measurements. Applies to all * channels, used only on Gen1 ADC_TM. * @base: base address of TM registers. * @adc_mutex_lock: ADC_TM mutex lock, used only on Gen2 ADC_TM. * It is used to ensure only one ADC channel configuration * is done at a time using the shared set of configuration * registers. */ struct adc_tm5_chip { … }; static int adc_tm5_read(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len) { … } static int adc_tm5_write(struct adc_tm5_chip *adc_tm, u16 offset, u8 *data, int len) { … } static int adc_tm5_reg_update(struct adc_tm5_chip *adc_tm, u16 offset, u8 mask, u8 val) { … } static irqreturn_t adc_tm5_isr(int irq, void *data) { … } static irqreturn_t adc_tm5_gen2_isr(int irq, void *data) { … } static int adc_tm5_get_temp(struct thermal_zone_device *tz, int *temp) { … } static int adc_tm5_disable_channel(struct adc_tm5_channel *channel) { … } #define ADC_TM_GEN2_POLL_DELAY_MIN_US … #define ADC_TM_GEN2_POLL_DELAY_MAX_US … #define ADC_TM_GEN2_POLL_RETRY_COUNT … static int32_t adc_tm5_gen2_conv_req(struct adc_tm5_chip *chip) { … } static int adc_tm5_gen2_disable_channel(struct adc_tm5_channel *channel) { … } static int adc_tm5_enable(struct adc_tm5_chip *chip) { … } static int adc_tm5_configure(struct adc_tm5_channel *channel, int low, int high) { … } static int adc_tm5_gen2_configure(struct adc_tm5_channel *channel, int low, int high) { … } static int adc_tm5_set_trips(struct thermal_zone_device *tz, int low, int high) { … } static const struct thermal_zone_device_ops adc_tm5_thermal_ops = …; static int adc_tm5_register_tzd(struct adc_tm5_chip *adc_tm) { … } static int adc_tm_hc_init(struct adc_tm5_chip *chip) { … } static int adc_tm5_init(struct adc_tm5_chip *chip) { … } static int adc_tm5_gen2_init(struct adc_tm5_chip *chip) { … } static int adc_tm5_get_dt_channel_data(struct adc_tm5_chip *adc_tm, struct adc_tm5_channel *channel, struct device_node *node) { … } static const struct adc_tm5_data adc_tm5_data_pmic = …; static const struct adc_tm5_data adc_tm_hc_data_pmic = …; static const struct adc_tm5_data adc_tm5_gen2_data_pmic = …; static int adc_tm5_get_dt_data(struct adc_tm5_chip *adc_tm, struct device_node *node) { … } static int adc_tm5_probe(struct platform_device *pdev) { … } static const struct of_device_id adc_tm5_match_table[] = …; MODULE_DEVICE_TABLE(of, adc_tm5_match_table); static struct platform_driver adc_tm5_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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