// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2013 BayHub Technology Ltd. * * Authors: Peter Guo <[email protected]> * Adam Lee <[email protected]> * Ernest Zhang <[email protected]> */ #include <linux/pci.h> #include <linux/mmc/host.h> #include <linux/mmc/mmc.h> #include <linux/delay.h> #include <linux/iopoll.h> #include <linux/bitfield.h> #include "sdhci.h" #include "sdhci-pci.h" /* * O2Micro device registers */ #define O2_SD_PCIE_SWITCH … #define O2_SD_MISC_REG5 … #define O2_SD_LD0_CTRL … #define O2_SD_DEV_CTRL … #define O2_SD_LOCK_WP … #define O2_SD_TEST_REG … #define O2_SD_FUNC_REG0 … #define O2_SD_MULTI_VCC3V … #define O2_SD_CLKREQ … #define O2_SD_CAPS … #define O2_SD_ADMA1 … #define O2_SD_ADMA2 … #define O2_SD_MISC_CTRL2 … #define O2_SD_INF_MOD … #define O2_SD_MISC_CTRL4 … #define O2_SD_MISC_CTRL … #define O2_SD_EXP_INT_REG … #define O2_SD_PWR_FORCE_L0 … #define O2_SD_TUNING_CTRL … #define O2_SD_PLL_SETTING … #define O2_SD_MISC_SETTING … #define O2_SD_CLK_SETTING … #define O2_SD_CAP_REG2 … #define O2_SD_CAP_REG0 … #define O2_SD_UHS1_CAP_SETTING … #define O2_SD_DELAY_CTRL … #define O2_SD_OUTPUT_CLK_SOURCE_SWITCH … #define O2_SD_UHS2_L1_CTRL … #define O2_SD_FUNC_REG3 … #define O2_SD_FUNC_REG4 … #define O2_SD_PARA_SET_REG1 … #define O2_SD_VDDX_CTRL_REG … #define O2_SD_GPIO_CTRL_REG1 … #define O2_SD_LED_ENABLE … #define O2_SD_FREG0_LEDOFF … #define O2_SD_SEL_DLL … #define O2_SD_FREG4_ENABLE_CLK_SET … #define O2_SD_PHASE_MASK … #define O2_SD_FIX_PHASE … #define O2_SD_VENDOR_SETTING … #define O2_SD_VENDOR_SETTING2 … #define O2_SD_HW_TUNING_DISABLE … #define O2_PLL_DLL_WDT_CONTROL1 … #define O2_PLL_FORCE_ACTIVE … #define O2_PLL_LOCK_STATUS … #define O2_PLL_SOFT_RESET … #define O2_DLL_LOCK_STATUS … #define O2_SD_DETECT_SETTING … static const u32 dmdn_table[] = …; #define DMDN_SZ … struct o2_host { … }; static void sdhci_o2_wait_card_detect_stable(struct sdhci_host *host) { … } static void sdhci_o2_enable_internal_clock(struct sdhci_host *host) { … } static int sdhci_o2_get_cd(struct mmc_host *mmc) { … } static void o2_pci_set_baseclk(struct sdhci_pci_chip *chip, u32 value) { … } static u32 sdhci_o2_pll_dll_wdt_control(struct sdhci_host *host) { … } /* * This function is used to detect dll lock status. * Since the dll lock status bit will toggle randomly * with very short interval which needs to be polled * as fast as possible. Set sleep_us as 1 microsecond. */ static int sdhci_o2_wait_dll_detect_lock(struct sdhci_host *host) { … } static void sdhci_o2_set_tuning_mode(struct sdhci_host *host) { … } static void __sdhci_o2_execute_tuning(struct sdhci_host *host, u32 opcode) { … } /* * This function is used to fix o2 dll shift issue. * It isn't necessary to detect card present before recovery. * Firstly, it is used by bht emmc card, which is embedded. * Second, before call recovery card present will be detected * outside of the execute tuning function. */ static int sdhci_o2_dll_recovery(struct sdhci_host *host) { … } static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode) { … } static void o2_pci_led_enable(struct sdhci_pci_chip *chip) { … } static void sdhci_pci_o2_fujin2_pci_init(struct sdhci_pci_chip *chip) { … } static void sdhci_pci_o2_enable_msi(struct sdhci_pci_chip *chip, struct sdhci_host *host) { … } static void sdhci_o2_enable_clk(struct sdhci_host *host, u16 clk) { … } static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock) { … } static int sdhci_pci_o2_init_sd_express(struct mmc_host *mmc, struct mmc_ios *ios) { … } static void sdhci_pci_o2_set_power(struct sdhci_host *host, unsigned char mode, unsigned short vdd) { … } static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) { … } static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip) { … } #ifdef CONFIG_PM_SLEEP static int sdhci_pci_o2_resume(struct sdhci_pci_chip *chip) { … } #endif static const struct sdhci_ops sdhci_pci_o2_ops = …; const struct sdhci_pci_fixes sdhci_o2 = …;
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