// SPDX-License-Identifier: GPL-2.0-or-later /* * Access SD/MMC cards through SPI master controllers * * (C) Copyright 2005, Intec Automation, * Mike Lavender (mike@steroidmicros) * (C) Copyright 2006-2007, David Brownell * (C) Copyright 2007, Axis Communications, * Hans-Peter Nilsson ([email protected]) * (C) Copyright 2007, ATRON electronic GmbH, * Jan Nikitenko <[email protected]> */ #include <linux/sched.h> #include <linux/delay.h> #include <linux/slab.h> #include <linux/module.h> #include <linux/bio.h> #include <linux/crc7.h> #include <linux/crc-itu-t.h> #include <linux/scatterlist.h> #include <linux/mmc/host.h> #include <linux/mmc/mmc.h> /* for R1_SPI_* bit values */ #include <linux/mmc/slot-gpio.h> #include <linux/spi/spi.h> #include <linux/spi/mmc_spi.h> #include <linux/unaligned.h> /* NOTES: * * - For now, we won't try to interoperate with a real mmc/sd/sdio * controller, although some of them do have hardware support for * SPI protocol. The main reason for such configs would be mmc-ish * cards like DataFlash, which don't support that "native" protocol. * * We don't have a "DataFlash/MMC/SD/SDIO card slot" abstraction to * switch between driver stacks, and in any case if "native" mode * is available, it will be faster and hence preferable. * * - MMC depends on a different chipselect management policy than the * SPI interface currently supports for shared bus segments: it needs * to issue multiple spi_message requests with the chipselect active, * using the results of one message to decide the next one to issue. * * Pending updates to the programming interface, this driver expects * that it not share the bus with other drivers (precluding conflicts). * * - We tell the controller to keep the chipselect active from the * beginning of an mmc_host_ops.request until the end. So beware * of SPI controller drivers that mis-handle the cs_change flag! * * However, many cards seem OK with chipselect flapping up/down * during that time ... at least on unshared bus segments. */ /* * Local protocol constants, internal to data block protocols. */ /* Response tokens used to ack each block written: */ #define SPI_MMC_RESPONSE_CODE(x) … #define SPI_RESPONSE_ACCEPTED … #define SPI_RESPONSE_CRC_ERR … #define SPI_RESPONSE_WRITE_ERR … /* Read and write blocks start with these tokens and end with crc; * on error, read tokens act like a subset of R2_SPI_* values. */ #define SPI_TOKEN_SINGLE … #define SPI_TOKEN_MULTI_WRITE … #define SPI_TOKEN_STOP_TRAN … #define MMC_SPI_BLOCKSIZE … #define MMC_SPI_R1B_TIMEOUT_MS … #define MMC_SPI_INIT_TIMEOUT_MS … /* One of the critical speed parameters is the amount of data which may * be transferred in one command. If this value is too low, the SD card * controller has to do multiple partial block writes (argggh!). With * today (2008) SD cards there is little speed gain if we transfer more * than 64 KBytes at a time. So use this value until there is any indication * that we should do more here. */ #define MMC_SPI_BLOCKSATONCE … /****************************************************************************/ /* * Local Data Structures */ /* "scratch" is per-{command,block} data exchanged with the card */ struct scratch { … }; struct mmc_spi_host { … }; /****************************************************************************/ /* * MMC-over-SPI protocol glue, used by the MMC stack interface */ static inline int mmc_cs_off(struct mmc_spi_host *host) { … } static int mmc_spi_readbytes(struct mmc_spi_host *host, unsigned int len) { … } static int mmc_spi_skip(struct mmc_spi_host *host, unsigned long timeout, unsigned n, u8 byte) { … } static inline int mmc_spi_wait_unbusy(struct mmc_spi_host *host, unsigned long timeout) { … } static int mmc_spi_readtoken(struct mmc_spi_host *host, unsigned long timeout) { … } /* * Note that for SPI, cmd->resp[0] is not the same data as "native" protocol * hosts return! The low byte holds R1_SPI bits. The next byte may hold * R2_SPI bits ... for SEND_STATUS, or after data read errors. * * cmd->resp[1] holds any four-byte response, for R3 (READ_OCR) and on * newer cards R7 (IF_COND). */ static char *maptype(struct mmc_command *cmd) { … } /* return zero, else negative errno after setting cmd->error */ static int mmc_spi_response_get(struct mmc_spi_host *host, struct mmc_command *cmd, int cs_on) { … } /* Issue command and read its response. * Returns zero on success, negative for error. * * On error, caller must cope with mmc core retry mechanism. That * means immediate low-level resubmit, which affects the bus lock... */ static int mmc_spi_command_send(struct mmc_spi_host *host, struct mmc_request *mrq, struct mmc_command *cmd, int cs_on) { … } /* Build data message with up to four separate transfers. For TX, we * start by writing the data token. And in most cases, we finish with * a status transfer. * * We always provide TX data for data and CRC. The MMC/SD protocol * requires us to write ones; but Linux defaults to writing zeroes; * so we explicitly initialize it to all ones on RX paths. */ static void mmc_spi_setup_data_message(struct mmc_spi_host *host, bool multiple, bool write) { … } /* * Write one block: * - caller handled preceding N(WR) [1+] all-ones bytes * - data block * + token * + data bytes * + crc16 * - an all-ones byte ... card writes a data-response byte * - followed by N(EC) [0+] all-ones bytes, card writes zero/'busy' * * Return negative errno, else success. */ static int mmc_spi_writeblock(struct mmc_spi_host *host, struct spi_transfer *t, unsigned long timeout) { … } /* * Read one block: * - skip leading all-ones bytes ... either * + N(AC) [1..f(clock,CSD)] usually, else * + N(CX) [0..8] when reading CSD or CID * - data block * + token ... if error token, no data or crc * + data bytes * + crc16 * * After single block reads, we're done; N(EC) [0+] all-ones bytes follow * before dropping chipselect. * * For multiblock reads, caller either reads the next block or issues a * STOP_TRANSMISSION command. */ static int mmc_spi_readblock(struct mmc_spi_host *host, struct spi_transfer *t, unsigned long timeout) { … } /* * An MMC/SD data stage includes one or more blocks, optional CRCs, * and inline handshaking. That handhaking makes it unlike most * other SPI protocol stacks. */ static void mmc_spi_data_do(struct mmc_spi_host *host, struct mmc_command *cmd, struct mmc_data *data, u32 blk_size) { … } /****************************************************************************/ /* * MMC driver implementation -- the interface to the MMC stack */ static void mmc_spi_request(struct mmc_host *mmc, struct mmc_request *mrq) { … } /* See Section 6.4.1, in SD "Simplified Physical Layer Specification 2.0" * * NOTE that here we can't know that the card has just been powered up; * not all MMC/SD sockets support power switching. * * FIXME when the card is still in SPI mode, e.g. from a previous kernel, * this doesn't seem to do the right thing at all... */ static void mmc_spi_initsequence(struct mmc_spi_host *host) { … } static char *mmc_powerstring(u8 power_mode) { … } static void mmc_spi_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) { … } static const struct mmc_host_ops mmc_spi_ops = …; /****************************************************************************/ /* * SPI driver implementation */ static irqreturn_t mmc_spi_detect_irq(int irq, void *mmc) { … } static int mmc_spi_probe(struct spi_device *spi) { … } static void mmc_spi_remove(struct spi_device *spi) { … } static const struct spi_device_id mmc_spi_dev_ids[] = …; MODULE_DEVICE_TABLE(spi, mmc_spi_dev_ids); static const struct of_device_id mmc_spi_of_match_table[] = …; MODULE_DEVICE_TABLE(of, mmc_spi_of_match_table); static struct spi_driver mmc_spi_driver = …; module_spi_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; MODULE_ALIAS(…) …;
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