linux/drivers/mmc/host/dw_mmc-exynos.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Exynos Specific Extensions for Synopsys DW Multimedia Card Interface driver
 *
 * Copyright (C) 2012, Samsung Electronics Co., Ltd.
 */

#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/mmc/host.h>
#include <linux/mmc/mmc.h>
#include <linux/of.h>
#include <linux/pm_runtime.h>
#include <linux/slab.h>

#include "dw_mmc.h"
#include "dw_mmc-pltfm.h"
#include "dw_mmc-exynos.h"

/* Variations in Exynos specific dw-mshc controller */
enum dw_mci_exynos_type {};

/* Exynos implementation specific driver private data */
struct dw_mci_exynos_priv_data {};

static struct dw_mci_exynos_compatible {} exynos_compat[] =;

static inline u8 dw_mci_exynos_get_ciu_div(struct dw_mci *host)
{}

static void dw_mci_exynos_config_smu(struct dw_mci *host)
{}

static int dw_mci_exynos_priv_init(struct dw_mci *host)
{}

static void dw_mci_exynos_set_clksel_timing(struct dw_mci *host, u32 timing)
{}

#ifdef CONFIG_PM
static int dw_mci_exynos_runtime_resume(struct device *dev)
{}
#endif /* CONFIG_PM */

#ifdef CONFIG_PM_SLEEP
/**
 * dw_mci_exynos_suspend_noirq - Exynos-specific suspend code
 * @dev: Device to suspend (this device)
 *
 * This ensures that device will be in runtime active state in
 * dw_mci_exynos_resume_noirq after calling pm_runtime_force_resume()
 */
static int dw_mci_exynos_suspend_noirq(struct device *dev)
{}

/**
 * dw_mci_exynos_resume_noirq - Exynos-specific resume code
 * @dev: Device to resume (this device)
 *
 * On exynos5420 there is a silicon errata that will sometimes leave the
 * WAKEUP_INT bit in the CLKSEL register asserted.  This bit is 1 to indicate
 * that it fired and we can clear it by writing a 1 back.  Clear it to prevent
 * interrupts from going off constantly.
 *
 * We run this code on all exynos variants because it doesn't hurt.
 */
static int dw_mci_exynos_resume_noirq(struct device *dev)
{}
#endif /* CONFIG_PM_SLEEP */

static void dw_mci_exynos_config_hs400(struct dw_mci *host, u32 timing)
{}

static void dw_mci_exynos_adjust_clock(struct dw_mci *host, unsigned int wanted)
{}

static void dw_mci_exynos_set_ios(struct dw_mci *host, struct mmc_ios *ios)
{}

static int dw_mci_exynos_parse_dt(struct dw_mci *host)
{}

static inline u8 dw_mci_exynos_get_clksmpl(struct dw_mci *host)
{}

static inline void dw_mci_exynos_set_clksmpl(struct dw_mci *host, u8 sample)
{}

static inline u8 dw_mci_exynos_move_next_clksmpl(struct dw_mci *host)
{}

static s8 dw_mci_exynos_get_best_clksmpl(u8 candidates)
{}

static int dw_mci_exynos_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
{}

static int dw_mci_exynos_prepare_hs400_tuning(struct dw_mci *host,
					struct mmc_ios *ios)
{}

static void dw_mci_exynos_set_data_timeout(struct dw_mci *host,
					   unsigned int timeout_ns)
{}

static u32 dw_mci_exynos_get_drto_clks(struct dw_mci *host)
{}

/* Common capabilities of Exynos4/Exynos5 SoC */
static unsigned long exynos_dwmmc_caps[4] =;

static const struct dw_mci_drv_data exynos_drv_data =;

static const struct dw_mci_drv_data artpec_drv_data =;

static const struct of_device_id dw_mci_exynos_match[] =;
MODULE_DEVICE_TABLE(of, dw_mci_exynos_match);

static int dw_mci_exynos_probe(struct platform_device *pdev)
{}

static void dw_mci_exynos_remove(struct platform_device *pdev)
{}

static const struct dev_pm_ops dw_mci_exynos_pmops =;

static struct platform_driver dw_mci_exynos_pltfm_driver =;

module_platform_driver();

MODULE_DESCRIPTION();
MODULE_AUTHOR();
MODULE_LICENSE();
MODULE_ALIAS();