// SPDX-License-Identifier: GPL-2.0-or-later /* * Actions Semi Owl SoCs SD/MMC driver * * Copyright (c) 2014 Actions Semi Inc. * Copyright (c) 2019 Manivannan Sadhasivam <[email protected]> * * TODO: SDIO support */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/dmaengine.h> #include <linux/dma-direction.h> #include <linux/dma-mapping.h> #include <linux/interrupt.h> #include <linux/mmc/host.h> #include <linux/mmc/slot-gpio.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/reset.h> #include <linux/spinlock.h> /* * SDC registers */ #define OWL_REG_SD_EN … #define OWL_REG_SD_CTL … #define OWL_REG_SD_STATE … #define OWL_REG_SD_CMD … #define OWL_REG_SD_ARG … #define OWL_REG_SD_RSPBUF0 … #define OWL_REG_SD_RSPBUF1 … #define OWL_REG_SD_RSPBUF2 … #define OWL_REG_SD_RSPBUF3 … #define OWL_REG_SD_RSPBUF4 … #define OWL_REG_SD_DAT … #define OWL_REG_SD_BLK_SIZE … #define OWL_REG_SD_BLK_NUM … #define OWL_REG_SD_BUF_SIZE … /* SD_EN Bits */ #define OWL_SD_EN_RANE … #define OWL_SD_EN_RAN_SEED(x) … #define OWL_SD_EN_S18EN … #define OWL_SD_EN_RESE … #define OWL_SD_EN_DAT1_S … #define OWL_SD_EN_CLK_S … #define OWL_SD_ENABLE … #define OWL_SD_EN_BSEL … #define OWL_SD_EN_SDIOEN … #define OWL_SD_EN_DDREN … #define OWL_SD_EN_DATAWID(x) … /* SD_CTL Bits */ #define OWL_SD_CTL_TOUTEN … #define OWL_SD_CTL_TOUTCNT(x) … #define OWL_SD_CTL_DELAY_MSK … #define OWL_SD_CTL_RDELAY(x) … #define OWL_SD_CTL_WDELAY(x) … #define OWL_SD_CTL_CMDLEN … #define OWL_SD_CTL_SCC … #define OWL_SD_CTL_TCN(x) … #define OWL_SD_CTL_TS … #define OWL_SD_CTL_LBE … #define OWL_SD_CTL_C7EN … #define OWL_SD_CTL_TM(x) … #define OWL_SD_DELAY_LOW_CLK … #define OWL_SD_DELAY_MID_CLK … #define OWL_SD_DELAY_HIGH_CLK … #define OWL_SD_RDELAY_DDR50 … #define OWL_SD_WDELAY_DDR50 … /* SD_STATE Bits */ #define OWL_SD_STATE_DAT1BS … #define OWL_SD_STATE_SDIOB_P … #define OWL_SD_STATE_SDIOB_EN … #define OWL_SD_STATE_TOUTE … #define OWL_SD_STATE_BAEP … #define OWL_SD_STATE_MEMRDY … #define OWL_SD_STATE_CMDS … #define OWL_SD_STATE_DAT1AS … #define OWL_SD_STATE_SDIOA_P … #define OWL_SD_STATE_SDIOA_EN … #define OWL_SD_STATE_DAT0S … #define OWL_SD_STATE_TEIE … #define OWL_SD_STATE_TEI … #define OWL_SD_STATE_CLNR … #define OWL_SD_STATE_CLC … #define OWL_SD_STATE_WC16ER … #define OWL_SD_STATE_RC16ER … #define OWL_SD_STATE_CRC7ER … #define OWL_CMD_TIMEOUT_MS … struct owl_mmc_host { … }; static void owl_mmc_update_reg(void __iomem *reg, unsigned int val, bool state) { … } static irqreturn_t owl_irq_handler(int irq, void *devid) { … } static void owl_mmc_finish_request(struct owl_mmc_host *owl_host) { … } static void owl_mmc_send_cmd(struct owl_mmc_host *owl_host, struct mmc_command *cmd, struct mmc_data *data) { … } static void owl_mmc_dma_complete(void *param) { … } static int owl_mmc_prepare_data(struct owl_mmc_host *owl_host, struct mmc_data *data) { … } static void owl_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) { … } static int owl_mmc_set_clk_rate(struct owl_mmc_host *owl_host, unsigned int rate) { … } static void owl_mmc_set_clk(struct owl_mmc_host *owl_host, struct mmc_ios *ios) { … } static void owl_mmc_set_bus_width(struct owl_mmc_host *owl_host, struct mmc_ios *ios) { … } static void owl_mmc_ctr_reset(struct owl_mmc_host *owl_host) { … } static void owl_mmc_power_on(struct owl_mmc_host *owl_host) { … } static void owl_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) { … } static int owl_mmc_start_signal_voltage_switch(struct mmc_host *mmc, struct mmc_ios *ios) { … } static const struct mmc_host_ops owl_mmc_ops = …; static int owl_mmc_probe(struct platform_device *pdev) { … } static void owl_mmc_remove(struct platform_device *pdev) { … } static const struct of_device_id owl_mmc_of_match[] = …; MODULE_DEVICE_TABLE(of, owl_mmc_of_match); static struct platform_driver owl_mmc_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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