linux/include/dt-bindings/clock/ingenic,jz4740-cgu.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * This header provides clock numbers for the ingenic,jz4740-cgu DT binding.
 *
 * They are roughly ordered as:
 *   - external clocks
 *   - PLLs
 *   - muxes/dividers in the order they appear in the jz4740 programmers manual
 *   - gates in order of their bit in the CLKGR* registers
 */

#ifndef __DT_BINDINGS_CLOCK_JZ4740_CGU_H__
#define __DT_BINDINGS_CLOCK_JZ4740_CGU_H__

#define JZ4740_CLK_EXT …
#define JZ4740_CLK_RTC …
#define JZ4740_CLK_PLL …
#define JZ4740_CLK_PLL_HALF …
#define JZ4740_CLK_CCLK …
#define JZ4740_CLK_HCLK …
#define JZ4740_CLK_PCLK …
#define JZ4740_CLK_MCLK …
#define JZ4740_CLK_LCD …
#define JZ4740_CLK_LCD_PCLK …
#define JZ4740_CLK_I2S …
#define JZ4740_CLK_SPI …
#define JZ4740_CLK_MMC …
#define JZ4740_CLK_UHC …
#define JZ4740_CLK_UDC …
#define JZ4740_CLK_UART0 …
#define JZ4740_CLK_UART1 …
#define JZ4740_CLK_DMA …
#define JZ4740_CLK_IPU …
#define JZ4740_CLK_ADC …
#define JZ4740_CLK_I2C …
#define JZ4740_CLK_AIC …
#define JZ4740_CLK_TCU …

#endif /* __DT_BINDINGS_CLOCK_JZ4740_CGU_H__ */