/* * Copyright (c) 2016 Hisilicon Limited. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef _HNS_ROCE_COMMON_H #define _HNS_ROCE_COMMON_H #include <linux/bitfield.h> #define roce_write(dev, reg, val) … #define roce_read(dev, reg) … #define roce_raw_write(value, addr) … #define roce_get_field(origin, mask, shift) … #define roce_get_bit(origin, shift) … #define roce_set_field(origin, mask, shift, val) … #define roce_set_bit(origin, shift, val) … #define FIELD_LOC(field_type, field_h, field_l) … #define _hr_reg_enable(ptr, field_type, field_h, field_l) … #define hr_reg_enable(ptr, field) … #define _hr_reg_clear(ptr, field_type, field_h, field_l) … #define hr_reg_clear(ptr, field) … #define _hr_reg_write_bool(ptr, field_type, field_h, field_l, val) … #define hr_reg_write_bool(ptr, field, val) … #define _hr_reg_write(ptr, field_type, field_h, field_l, val) … #define hr_reg_write(ptr, field, val) … #define _hr_reg_read(ptr, field_type, field_h, field_l) … #define hr_reg_read(ptr, field) … /*************ROCEE_REG DEFINITION****************/ #define ROCEE_VENDOR_ID_REG … #define ROCEE_VENDOR_PART_ID_REG … #define ROCEE_SYS_IMAGE_GUID_L_REG … #define ROCEE_SYS_IMAGE_GUID_H_REG … #define ROCEE_PORT_GID_L_0_REG … #define ROCEE_PORT_GID_ML_0_REG … #define ROCEE_PORT_GID_MH_0_REG … #define ROCEE_PORT_GID_H_0_REG … #define ROCEE_BT_CMD_H_REG … #define ROCEE_SMAC_L_0_REG … #define ROCEE_SMAC_H_0_REG … #define ROCEE_QP1C_CFG3_0_REG … #define ROCEE_CAEP_AEQE_CONS_IDX_REG … #define ROCEE_CAEP_CEQC_CONS_IDX_0_REG … #define ROCEE_ECC_UCERR_ALM1_REG … #define ROCEE_ECC_UCERR_ALM2_REG … #define ROCEE_ECC_CERR_ALM1_REG … #define ROCEE_ECC_CERR_ALM2_REG … #define ROCEE_ACK_DELAY_REG … #define ROCEE_GLB_CFG_REG … #define ROCEE_DMAE_USER_CFG1_REG … #define ROCEE_DMAE_USER_CFG2_REG … #define ROCEE_DB_SQ_WL_REG … #define ROCEE_DB_OTHERS_WL_REG … #define ROCEE_RAQ_WL_REG … #define ROCEE_WRMS_POL_TIME_INTERVAL_REG … #define ROCEE_EXT_DB_SQ_REG … #define ROCEE_EXT_DB_SQ_H_REG … #define ROCEE_EXT_DB_OTH_REG … #define ROCEE_EXT_DB_OTH_H_REG … #define ROCEE_EXT_DB_SQ_WL_EMPTY_REG … #define ROCEE_EXT_DB_SQ_WL_REG … #define ROCEE_EXT_DB_OTHERS_WL_EMPTY_REG … #define ROCEE_EXT_DB_OTHERS_WL_REG … #define ROCEE_EXT_RAQ_REG … #define ROCEE_EXT_RAQ_H_REG … #define ROCEE_CAEP_CE_INTERVAL_CFG_REG … #define ROCEE_CAEP_CE_BURST_NUM_CFG_REG … #define ROCEE_BT_CMD_L_REG … #define ROCEE_MB1_REG … #define ROCEE_MB6_REG … #define ROCEE_DB_SQ_L_0_REG … #define ROCEE_DB_OTHERS_L_0_REG … #define ROCEE_QP1C_CFG0_0_REG … #define ROCEE_CAEP_AEQC_AEQE_SHIFT_REG … #define ROCEE_CAEP_CEQC_SHIFT_0_REG … #define ROCEE_CAEP_CE_IRQ_MASK_0_REG … #define ROCEE_CAEP_CEQ_ALM_OVF_0_REG … #define ROCEE_CAEP_AE_MASK_REG … #define ROCEE_CAEP_AE_ST_REG … #define ROCEE_CAEP_CQE_WCMD_EMPTY … #define ROCEE_SCAEP_WR_CQE_CNT … #define ROCEE_ECC_UCERR_ALM0_REG … #define ROCEE_ECC_CERR_ALM0_REG … /* V2 ROCEE REG */ #define ROCEE_TX_CMQ_BASEADDR_L_REG … #define ROCEE_TX_CMQ_BASEADDR_H_REG … #define ROCEE_TX_CMQ_DEPTH_REG … #define ROCEE_TX_CMQ_PI_REG … #define ROCEE_TX_CMQ_CI_REG … #define ROCEE_RX_CMQ_BASEADDR_L_REG … #define ROCEE_RX_CMQ_BASEADDR_H_REG … #define ROCEE_RX_CMQ_DEPTH_REG … #define ROCEE_RX_CMQ_TAIL_REG … #define ROCEE_RX_CMQ_HEAD_REG … #define ROCEE_VF_EQ_DB_CFG0_REG … #define ROCEE_VF_EQ_DB_CFG1_REG … #define ROCEE_VF_ABN_INT_CFG_REG … #define ROCEE_VF_ABN_INT_ST_REG … #define ROCEE_VF_ABN_INT_EN_REG … #define ROCEE_VF_EVENT_INT_EN_REG … #endif /* _HNS_ROCE_COMMON_H */
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