// SPDX-License-Identifier: GPL-2.0-only /* * cs_dsp.c -- Cirrus Logic DSP firmware support * * Based on sound/soc/codecs/wm_adsp.c * * Copyright 2012 Wolfson Microelectronics plc * Copyright (C) 2015-2021 Cirrus Logic, Inc. and * Cirrus Logic International Semiconductor Ltd. */ #include <linux/ctype.h> #include <linux/debugfs.h> #include <linux/delay.h> #include <linux/minmax.h> #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/seq_file.h> #include <linux/slab.h> #include <linux/vmalloc.h> #include <linux/firmware/cirrus/cs_dsp.h> #include <linux/firmware/cirrus/wmfw.h> #define cs_dsp_err(_dsp, fmt, ...) … #define cs_dsp_warn(_dsp, fmt, ...) … #define cs_dsp_info(_dsp, fmt, ...) … #define cs_dsp_dbg(_dsp, fmt, ...) … #define ADSP1_CONTROL_1 … #define ADSP1_CONTROL_2 … #define ADSP1_CONTROL_3 … #define ADSP1_CONTROL_4 … #define ADSP1_CONTROL_5 … #define ADSP1_CONTROL_6 … #define ADSP1_CONTROL_7 … #define ADSP1_CONTROL_8 … #define ADSP1_CONTROL_9 … #define ADSP1_CONTROL_10 … #define ADSP1_CONTROL_11 … #define ADSP1_CONTROL_12 … #define ADSP1_CONTROL_13 … #define ADSP1_CONTROL_14 … #define ADSP1_CONTROL_15 … #define ADSP1_CONTROL_16 … #define ADSP1_CONTROL_17 … #define ADSP1_CONTROL_18 … #define ADSP1_CONTROL_19 … #define ADSP1_CONTROL_20 … #define ADSP1_CONTROL_21 … #define ADSP1_CONTROL_22 … #define ADSP1_CONTROL_23 … #define ADSP1_CONTROL_24 … #define ADSP1_CONTROL_25 … #define ADSP1_CONTROL_26 … #define ADSP1_CONTROL_27 … #define ADSP1_CONTROL_28 … #define ADSP1_CONTROL_29 … #define ADSP1_CONTROL_30 … #define ADSP1_CONTROL_31 … /* * ADSP1 Control 19 */ #define ADSP1_WDMA_BUFFER_LENGTH_MASK … #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT … #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH … /* * ADSP1 Control 30 */ #define ADSP1_DBG_CLK_ENA … #define ADSP1_DBG_CLK_ENA_MASK … #define ADSP1_DBG_CLK_ENA_SHIFT … #define ADSP1_DBG_CLK_ENA_WIDTH … #define ADSP1_SYS_ENA … #define ADSP1_SYS_ENA_MASK … #define ADSP1_SYS_ENA_SHIFT … #define ADSP1_SYS_ENA_WIDTH … #define ADSP1_CORE_ENA … #define ADSP1_CORE_ENA_MASK … #define ADSP1_CORE_ENA_SHIFT … #define ADSP1_CORE_ENA_WIDTH … #define ADSP1_START … #define ADSP1_START_MASK … #define ADSP1_START_SHIFT … #define ADSP1_START_WIDTH … /* * ADSP1 Control 31 */ #define ADSP1_CLK_SEL_MASK … #define ADSP1_CLK_SEL_SHIFT … #define ADSP1_CLK_SEL_WIDTH … #define ADSP2_CONTROL … #define ADSP2_CLOCKING … #define ADSP2V2_CLOCKING … #define ADSP2_STATUS1 … #define ADSP2_WDMA_CONFIG_1 … #define ADSP2_WDMA_CONFIG_2 … #define ADSP2V2_WDMA_CONFIG_2 … #define ADSP2_RDMA_CONFIG_1 … #define ADSP2_SCRATCH0 … #define ADSP2_SCRATCH1 … #define ADSP2_SCRATCH2 … #define ADSP2_SCRATCH3 … #define ADSP2V2_SCRATCH0_1 … #define ADSP2V2_SCRATCH2_3 … /* * ADSP2 Control */ #define ADSP2_MEM_ENA … #define ADSP2_MEM_ENA_MASK … #define ADSP2_MEM_ENA_SHIFT … #define ADSP2_MEM_ENA_WIDTH … #define ADSP2_SYS_ENA … #define ADSP2_SYS_ENA_MASK … #define ADSP2_SYS_ENA_SHIFT … #define ADSP2_SYS_ENA_WIDTH … #define ADSP2_CORE_ENA … #define ADSP2_CORE_ENA_MASK … #define ADSP2_CORE_ENA_SHIFT … #define ADSP2_CORE_ENA_WIDTH … #define ADSP2_START … #define ADSP2_START_MASK … #define ADSP2_START_SHIFT … #define ADSP2_START_WIDTH … /* * ADSP2 clocking */ #define ADSP2_CLK_SEL_MASK … #define ADSP2_CLK_SEL_SHIFT … #define ADSP2_CLK_SEL_WIDTH … /* * ADSP2V2 clocking */ #define ADSP2V2_CLK_SEL_MASK … #define ADSP2V2_CLK_SEL_SHIFT … #define ADSP2V2_CLK_SEL_WIDTH … #define ADSP2V2_RATE_MASK … #define ADSP2V2_RATE_SHIFT … #define ADSP2V2_RATE_WIDTH … /* * ADSP2 Status 1 */ #define ADSP2_RAM_RDY … #define ADSP2_RAM_RDY_MASK … #define ADSP2_RAM_RDY_SHIFT … #define ADSP2_RAM_RDY_WIDTH … /* * ADSP2 Lock support */ #define ADSP2_LOCK_CODE_0 … #define ADSP2_LOCK_CODE_1 … #define ADSP2_WATCHDOG … #define ADSP2_BUS_ERR_ADDR … #define ADSP2_REGION_LOCK_STATUS … #define ADSP2_LOCK_REGION_1_LOCK_REGION_0 … #define ADSP2_LOCK_REGION_3_LOCK_REGION_2 … #define ADSP2_LOCK_REGION_5_LOCK_REGION_4 … #define ADSP2_LOCK_REGION_7_LOCK_REGION_6 … #define ADSP2_LOCK_REGION_9_LOCK_REGION_8 … #define ADSP2_LOCK_REGION_CTRL … #define ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR … #define ADSP2_REGION_LOCK_ERR_MASK … #define ADSP2_ADDR_ERR_MASK … #define ADSP2_WDT_TIMEOUT_STS_MASK … #define ADSP2_CTRL_ERR_PAUSE_ENA … #define ADSP2_CTRL_ERR_EINT … #define ADSP2_BUS_ERR_ADDR_MASK … #define ADSP2_XMEM_ERR_ADDR_MASK … #define ADSP2_PMEM_ERR_ADDR_MASK … #define ADSP2_PMEM_ERR_ADDR_SHIFT … #define ADSP2_WDT_ENA_MASK … #define ADSP2_LOCK_REGION_SHIFT … /* * Event control messages */ #define CS_DSP_FW_EVENT_SHUTDOWN … /* * HALO system info */ #define HALO_AHBM_WINDOW_DEBUG_0 … #define HALO_AHBM_WINDOW_DEBUG_1 … /* * HALO core */ #define HALO_SCRATCH1 … #define HALO_SCRATCH2 … #define HALO_SCRATCH3 … #define HALO_SCRATCH4 … #define HALO_CCM_CORE_CONTROL … #define HALO_CORE_SOFT_RESET … #define HALO_WDT_CONTROL … /* * HALO MPU banks */ #define HALO_MPU_XMEM_ACCESS_0 … #define HALO_MPU_YMEM_ACCESS_0 … #define HALO_MPU_WINDOW_ACCESS_0 … #define HALO_MPU_XREG_ACCESS_0 … #define HALO_MPU_YREG_ACCESS_0 … #define HALO_MPU_XMEM_ACCESS_1 … #define HALO_MPU_YMEM_ACCESS_1 … #define HALO_MPU_WINDOW_ACCESS_1 … #define HALO_MPU_XREG_ACCESS_1 … #define HALO_MPU_YREG_ACCESS_1 … #define HALO_MPU_XMEM_ACCESS_2 … #define HALO_MPU_YMEM_ACCESS_2 … #define HALO_MPU_WINDOW_ACCESS_2 … #define HALO_MPU_XREG_ACCESS_2 … #define HALO_MPU_YREG_ACCESS_2 … #define HALO_MPU_XMEM_ACCESS_3 … #define HALO_MPU_YMEM_ACCESS_3 … #define HALO_MPU_WINDOW_ACCESS_3 … #define HALO_MPU_XREG_ACCESS_3 … #define HALO_MPU_YREG_ACCESS_3 … #define HALO_MPU_XM_VIO_ADDR … #define HALO_MPU_XM_VIO_STATUS … #define HALO_MPU_YM_VIO_ADDR … #define HALO_MPU_YM_VIO_STATUS … #define HALO_MPU_PM_VIO_ADDR … #define HALO_MPU_PM_VIO_STATUS … #define HALO_MPU_LOCK_CONFIG … /* * HALO_AHBM_WINDOW_DEBUG_1 */ #define HALO_AHBM_CORE_ERR_ADDR_MASK … #define HALO_AHBM_CORE_ERR_ADDR_SHIFT … #define HALO_AHBM_FLAGS_ERR_MASK … /* * HALO_CCM_CORE_CONTROL */ #define HALO_CORE_RESET … #define HALO_CORE_EN … /* * HALO_CORE_SOFT_RESET */ #define HALO_CORE_SOFT_RESET_MASK … /* * HALO_WDT_CONTROL */ #define HALO_WDT_EN_MASK … /* * HALO_MPU_?M_VIO_STATUS */ #define HALO_MPU_VIO_STS_MASK … #define HALO_MPU_VIO_STS_SHIFT … #define HALO_MPU_VIO_ERR_WR_MASK … #define HALO_MPU_VIO_ERR_SRC_MASK … #define HALO_MPU_VIO_ERR_SRC_SHIFT … /* * Write Sequence */ #define WSEQ_OP_MAX_WORDS … #define WSEQ_END_OF_SCRIPT … struct cs_dsp_ops { … }; static const struct cs_dsp_ops cs_dsp_adsp1_ops; static const struct cs_dsp_ops cs_dsp_adsp2_ops[]; static const struct cs_dsp_ops cs_dsp_halo_ops; static const struct cs_dsp_ops cs_dsp_halo_ao_ops; struct cs_dsp_buf { … }; static struct cs_dsp_buf *cs_dsp_buf_alloc(const void *src, size_t len, struct list_head *list) { … } static void cs_dsp_buf_free(struct list_head *list) { … } /** * cs_dsp_mem_region_name() - Return a name string for a memory type * @type: the memory type to match * * Return: A const string identifying the memory region. */ const char *cs_dsp_mem_region_name(unsigned int type) { … } EXPORT_SYMBOL_NS_GPL(…); #ifdef CONFIG_DEBUG_FS static void cs_dsp_debugfs_save_wmfwname(struct cs_dsp *dsp, const char *s) { … } static void cs_dsp_debugfs_save_binname(struct cs_dsp *dsp, const char *s) { … } static void cs_dsp_debugfs_clear(struct cs_dsp *dsp) { … } static ssize_t cs_dsp_debugfs_wmfw_read(struct file *file, char __user *user_buf, size_t count, loff_t *ppos) { … } static ssize_t cs_dsp_debugfs_bin_read(struct file *file, char __user *user_buf, size_t count, loff_t *ppos) { … } static const struct { … } cs_dsp_debugfs_fops[] = …; static int cs_dsp_coeff_base_reg(struct cs_dsp_coeff_ctl *ctl, unsigned int *reg, unsigned int off); static int cs_dsp_debugfs_read_controls_show(struct seq_file *s, void *ignored) { … } DEFINE_SHOW_ATTRIBUTE(…); /** * cs_dsp_init_debugfs() - Create and populate DSP representation in debugfs * @dsp: pointer to DSP structure * @debugfs_root: pointer to debugfs directory in which to create this DSP * representation */ void cs_dsp_init_debugfs(struct cs_dsp *dsp, struct dentry *debugfs_root) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_cleanup_debugfs() - Removes DSP representation from debugfs * @dsp: pointer to DSP structure */ void cs_dsp_cleanup_debugfs(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); #else void cs_dsp_init_debugfs(struct cs_dsp *dsp, struct dentry *debugfs_root) { } EXPORT_SYMBOL_NS_GPL(cs_dsp_init_debugfs, FW_CS_DSP); void cs_dsp_cleanup_debugfs(struct cs_dsp *dsp) { } EXPORT_SYMBOL_NS_GPL(cs_dsp_cleanup_debugfs, FW_CS_DSP); static inline void cs_dsp_debugfs_save_wmfwname(struct cs_dsp *dsp, const char *s) { } static inline void cs_dsp_debugfs_save_binname(struct cs_dsp *dsp, const char *s) { } static inline void cs_dsp_debugfs_clear(struct cs_dsp *dsp) { } #endif static const struct cs_dsp_region *cs_dsp_find_region(struct cs_dsp *dsp, int type) { … } static unsigned int cs_dsp_region_to_reg(struct cs_dsp_region const *mem, unsigned int offset) { … } static unsigned int cs_dsp_halo_region_to_reg(struct cs_dsp_region const *mem, unsigned int offset) { … } static void cs_dsp_read_fw_status(struct cs_dsp *dsp, int noffs, unsigned int *offs) { … } static void cs_dsp_adsp2_show_fw_status(struct cs_dsp *dsp) { … } static void cs_dsp_adsp2v2_show_fw_status(struct cs_dsp *dsp) { … } static void cs_dsp_halo_show_fw_status(struct cs_dsp *dsp) { … } static int cs_dsp_coeff_base_reg(struct cs_dsp_coeff_ctl *ctl, unsigned int *reg, unsigned int off) { … } /** * cs_dsp_coeff_write_acked_control() - Sends event_id to the acked control * @ctl: pointer to acked coefficient control * @event_id: the value to write to the given acked control * * Once the value has been written to the control the function shall block * until the running firmware acknowledges the write or timeout is exceeded. * * Must be called with pwr_lock held. * * Return: Zero for success, a negative number on error. */ int cs_dsp_coeff_write_acked_control(struct cs_dsp_coeff_ctl *ctl, unsigned int event_id) { … } EXPORT_SYMBOL_NS_GPL(…); static int cs_dsp_coeff_write_ctrl_raw(struct cs_dsp_coeff_ctl *ctl, unsigned int off, const void *buf, size_t len) { … } /** * cs_dsp_coeff_write_ctrl() - Writes the given buffer to the given coefficient control * @ctl: pointer to coefficient control * @off: word offset at which data should be written * @buf: the buffer to write to the given control * @len: the length of the buffer in bytes * * Must be called with pwr_lock held. * * Return: < 0 on error, 1 when the control value changed and 0 when it has not. */ int cs_dsp_coeff_write_ctrl(struct cs_dsp_coeff_ctl *ctl, unsigned int off, const void *buf, size_t len) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_coeff_lock_and_write_ctrl() - Writes the given buffer to the given coefficient control * @ctl: pointer to coefficient control * @off: word offset at which data should be written * @buf: the buffer to write to the given control * @len: the length of the buffer in bytes * * Same as cs_dsp_coeff_write_ctrl() but takes pwr_lock. * * Return: A negative number on error, 1 when the control value changed and 0 when it has not. */ int cs_dsp_coeff_lock_and_write_ctrl(struct cs_dsp_coeff_ctl *ctl, unsigned int off, const void *buf, size_t len) { … } EXPORT_SYMBOL_GPL(…); static int cs_dsp_coeff_read_ctrl_raw(struct cs_dsp_coeff_ctl *ctl, unsigned int off, void *buf, size_t len) { … } /** * cs_dsp_coeff_read_ctrl() - Reads the given coefficient control into the given buffer * @ctl: pointer to coefficient control * @off: word offset at which data should be read * @buf: the buffer to store to the given control * @len: the length of the buffer in bytes * * Must be called with pwr_lock held. * * Return: Zero for success, a negative number on error. */ int cs_dsp_coeff_read_ctrl(struct cs_dsp_coeff_ctl *ctl, unsigned int off, void *buf, size_t len) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_coeff_lock_and_read_ctrl() - Reads the given coefficient control into the given buffer * @ctl: pointer to coefficient control * @off: word offset at which data should be read * @buf: the buffer to store to the given control * @len: the length of the buffer in bytes * * Same as cs_dsp_coeff_read_ctrl() but takes pwr_lock. * * Return: Zero for success, a negative number on error. */ int cs_dsp_coeff_lock_and_read_ctrl(struct cs_dsp_coeff_ctl *ctl, unsigned int off, void *buf, size_t len) { … } EXPORT_SYMBOL_GPL(…); static int cs_dsp_coeff_init_control_caches(struct cs_dsp *dsp) { … } static int cs_dsp_coeff_sync_controls(struct cs_dsp *dsp) { … } static void cs_dsp_signal_event_controls(struct cs_dsp *dsp, unsigned int event) { … } static void cs_dsp_free_ctl_blk(struct cs_dsp_coeff_ctl *ctl) { … } static int cs_dsp_create_control(struct cs_dsp *dsp, const struct cs_dsp_alg_region *alg_region, unsigned int offset, unsigned int len, const char *subname, unsigned int subname_len, unsigned int flags, unsigned int type) { … } struct cs_dsp_coeff_parsed_alg { … }; struct cs_dsp_coeff_parsed_coeff { … }; static int cs_dsp_coeff_parse_string(int bytes, const u8 **pos, unsigned int avail, const u8 **str) { … } static int cs_dsp_coeff_parse_int(int bytes, const u8 **pos) { … } static int cs_dsp_coeff_parse_alg(struct cs_dsp *dsp, const struct wmfw_region *region, struct cs_dsp_coeff_parsed_alg *blk) { … } static int cs_dsp_coeff_parse_coeff(struct cs_dsp *dsp, const struct wmfw_region *region, unsigned int pos, struct cs_dsp_coeff_parsed_coeff *blk) { … } static int cs_dsp_check_coeff_flags(struct cs_dsp *dsp, const struct cs_dsp_coeff_parsed_coeff *coeff_blk, unsigned int f_required, unsigned int f_illegal) { … } static int cs_dsp_parse_coeff(struct cs_dsp *dsp, const struct wmfw_region *region) { … } static unsigned int cs_dsp_adsp1_parse_sizes(struct cs_dsp *dsp, const char * const file, unsigned int pos, const struct firmware *firmware) { … } static unsigned int cs_dsp_adsp2_parse_sizes(struct cs_dsp *dsp, const char * const file, unsigned int pos, const struct firmware *firmware) { … } static bool cs_dsp_validate_version(struct cs_dsp *dsp, unsigned int version) { … } static bool cs_dsp_halo_validate_version(struct cs_dsp *dsp, unsigned int version) { … } static int cs_dsp_load(struct cs_dsp *dsp, const struct firmware *firmware, const char *file) { … } /** * cs_dsp_get_ctl() - Finds a matching coefficient control * @dsp: pointer to DSP structure * @name: pointer to string to match with a control's subname * @type: the algorithm type to match * @alg: the algorithm id to match * * Find cs_dsp_coeff_ctl with input name as its subname * * Return: pointer to the control on success, NULL if not found */ struct cs_dsp_coeff_ctl *cs_dsp_get_ctl(struct cs_dsp *dsp, const char *name, int type, unsigned int alg) { … } EXPORT_SYMBOL_NS_GPL(…); static void cs_dsp_ctl_fixup_base(struct cs_dsp *dsp, const struct cs_dsp_alg_region *alg_region) { … } static void *cs_dsp_read_algs(struct cs_dsp *dsp, size_t n_algs, const struct cs_dsp_region *mem, unsigned int pos, unsigned int len) { … } /** * cs_dsp_find_alg_region() - Finds a matching algorithm region * @dsp: pointer to DSP structure * @type: the algorithm type to match * @id: the algorithm id to match * * Return: Pointer to matching algorithm region, or NULL if not found. */ struct cs_dsp_alg_region *cs_dsp_find_alg_region(struct cs_dsp *dsp, int type, unsigned int id) { … } EXPORT_SYMBOL_NS_GPL(…); static struct cs_dsp_alg_region *cs_dsp_create_region(struct cs_dsp *dsp, int type, __be32 id, __be32 ver, __be32 base) { … } static void cs_dsp_free_alg_regions(struct cs_dsp *dsp) { … } static void cs_dsp_parse_wmfw_id_header(struct cs_dsp *dsp, struct wmfw_id_hdr *fw, int nalgs) { … } static void cs_dsp_parse_wmfw_v3_id_header(struct cs_dsp *dsp, struct wmfw_v3_id_hdr *fw, int nalgs) { … } static int cs_dsp_create_regions(struct cs_dsp *dsp, __be32 id, __be32 ver, int nregions, const int *type, __be32 *base) { … } static int cs_dsp_adsp1_setup_algs(struct cs_dsp *dsp) { … } static int cs_dsp_adsp2_setup_algs(struct cs_dsp *dsp) { … } static int cs_dsp_halo_create_regions(struct cs_dsp *dsp, __be32 id, __be32 ver, __be32 xm_base, __be32 ym_base) { … } static int cs_dsp_halo_setup_algs(struct cs_dsp *dsp) { … } static int cs_dsp_load_coeff(struct cs_dsp *dsp, const struct firmware *firmware, const char *file) { … } static int cs_dsp_create_name(struct cs_dsp *dsp) { … } static int cs_dsp_common_init(struct cs_dsp *dsp) { … } /** * cs_dsp_adsp1_init() - Initialise a cs_dsp structure representing a ADSP1 device * @dsp: pointer to DSP structure * * Return: Zero for success, a negative number on error. */ int cs_dsp_adsp1_init(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_adsp1_power_up() - Load and start the named firmware * @dsp: pointer to DSP structure * @wmfw_firmware: the firmware to be sent * @wmfw_filename: file name of firmware to be sent * @coeff_firmware: the coefficient data to be sent * @coeff_filename: file name of coefficient to data be sent * @fw_name: the user-friendly firmware name * * Return: Zero for success, a negative number on error. */ int cs_dsp_adsp1_power_up(struct cs_dsp *dsp, const struct firmware *wmfw_firmware, const char *wmfw_filename, const struct firmware *coeff_firmware, const char *coeff_filename, const char *fw_name) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_adsp1_power_down() - Halts the DSP * @dsp: pointer to DSP structure */ void cs_dsp_adsp1_power_down(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); static int cs_dsp_adsp2v2_enable_core(struct cs_dsp *dsp) { … } static int cs_dsp_adsp2_enable_core(struct cs_dsp *dsp) { … } static int cs_dsp_adsp2_lock(struct cs_dsp *dsp, unsigned int lock_regions) { … } static int cs_dsp_adsp2_enable_memory(struct cs_dsp *dsp) { … } static void cs_dsp_adsp2_disable_memory(struct cs_dsp *dsp) { … } static void cs_dsp_adsp2_disable_core(struct cs_dsp *dsp) { … } static void cs_dsp_adsp2v2_disable_core(struct cs_dsp *dsp) { … } static int cs_dsp_halo_configure_mpu(struct cs_dsp *dsp, unsigned int lock_regions) { … } /** * cs_dsp_set_dspclk() - Applies the given frequency to the given cs_dsp * @dsp: pointer to DSP structure * @freq: clock rate to set * * This is only for use on ADSP2 cores. * * Return: Zero for success, a negative number on error. */ int cs_dsp_set_dspclk(struct cs_dsp *dsp, unsigned int freq) { … } EXPORT_SYMBOL_NS_GPL(…); static void cs_dsp_stop_watchdog(struct cs_dsp *dsp) { … } static void cs_dsp_halo_stop_watchdog(struct cs_dsp *dsp) { … } /** * cs_dsp_power_up() - Downloads firmware to the DSP * @dsp: pointer to DSP structure * @wmfw_firmware: the firmware to be sent * @wmfw_filename: file name of firmware to be sent * @coeff_firmware: the coefficient data to be sent * @coeff_filename: file name of coefficient to data be sent * @fw_name: the user-friendly firmware name * * This function is used on ADSP2 and Halo DSP cores, it powers-up the DSP core * and downloads the firmware but does not start the firmware running. The * cs_dsp booted flag will be set once completed and if the core has a low-power * memory retention mode it will be put into this state after the firmware is * downloaded. * * Return: Zero for success, a negative number on error. */ int cs_dsp_power_up(struct cs_dsp *dsp, const struct firmware *wmfw_firmware, const char *wmfw_filename, const struct firmware *coeff_firmware, const char *coeff_filename, const char *fw_name) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_power_down() - Powers-down the DSP * @dsp: pointer to DSP structure * * cs_dsp_stop() must have been called before this function. The core will be * fully powered down and so the memory will not be retained. */ void cs_dsp_power_down(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); static int cs_dsp_adsp2_start_core(struct cs_dsp *dsp) { … } static void cs_dsp_adsp2_stop_core(struct cs_dsp *dsp) { … } /** * cs_dsp_run() - Starts the firmware running * @dsp: pointer to DSP structure * * cs_dsp_power_up() must have previously been called successfully. * * Return: Zero for success, a negative number on error. */ int cs_dsp_run(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_stop() - Stops the firmware * @dsp: pointer to DSP structure * * Memory will not be disabled so firmware will remain loaded. */ void cs_dsp_stop(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); static int cs_dsp_halo_start_core(struct cs_dsp *dsp) { … } static void cs_dsp_halo_stop_core(struct cs_dsp *dsp) { … } /** * cs_dsp_adsp2_init() - Initialise a cs_dsp structure representing a ADSP2 core * @dsp: pointer to DSP structure * * Return: Zero for success, a negative number on error. */ int cs_dsp_adsp2_init(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_halo_init() - Initialise a cs_dsp structure representing a HALO Core DSP * @dsp: pointer to DSP structure * * Return: Zero for success, a negative number on error. */ int cs_dsp_halo_init(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_remove() - Clean a cs_dsp before deletion * @dsp: pointer to DSP structure */ void cs_dsp_remove(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_read_raw_data_block() - Reads a block of data from DSP memory * @dsp: pointer to DSP structure * @mem_type: the type of DSP memory containing the data to be read * @mem_addr: the address of the data within the memory region * @num_words: the length of the data to read * @data: a buffer to store the fetched data * * If this is used to read unpacked 24-bit memory, each 24-bit DSP word will * occupy 32-bits in data (MSbyte will be 0). This padding can be removed using * cs_dsp_remove_padding() * * Return: Zero for success, a negative number on error. */ int cs_dsp_read_raw_data_block(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, unsigned int num_words, __be32 *data) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_read_data_word() - Reads a word from DSP memory * @dsp: pointer to DSP structure * @mem_type: the type of DSP memory containing the data to be read * @mem_addr: the address of the data within the memory region * @data: a buffer to store the fetched data * * Return: Zero for success, a negative number on error. */ int cs_dsp_read_data_word(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, u32 *data) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_write_data_word() - Writes a word to DSP memory * @dsp: pointer to DSP structure * @mem_type: the type of DSP memory containing the data to be written * @mem_addr: the address of the data within the memory region * @data: the data to be written * * Return: Zero for success, a negative number on error. */ int cs_dsp_write_data_word(struct cs_dsp *dsp, int mem_type, unsigned int mem_addr, u32 data) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_remove_padding() - Convert unpacked words to packed bytes * @buf: buffer containing DSP words read from DSP memory * @nwords: number of words to convert * * DSP words from the register map have pad bytes and the data bytes * are in swapped order. This swaps to the native endian order and * strips the pad bytes. */ void cs_dsp_remove_padding(u32 *buf, int nwords) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_adsp2_bus_error() - Handle a DSP bus error interrupt * @dsp: pointer to DSP structure * * The firmware and DSP state will be logged for future analysis. */ void cs_dsp_adsp2_bus_error(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_halo_bus_error() - Handle a DSP bus error interrupt * @dsp: pointer to DSP structure * * The firmware and DSP state will be logged for future analysis. */ void cs_dsp_halo_bus_error(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_halo_wdt_expire() - Handle DSP watchdog expiry * @dsp: pointer to DSP structure * * This is logged for future analysis. */ void cs_dsp_halo_wdt_expire(struct cs_dsp *dsp) { … } EXPORT_SYMBOL_NS_GPL(…); static const struct cs_dsp_ops cs_dsp_adsp1_ops = …; static const struct cs_dsp_ops cs_dsp_adsp2_ops[] = …; static const struct cs_dsp_ops cs_dsp_halo_ops = …; static const struct cs_dsp_ops cs_dsp_halo_ao_ops = …; /** * cs_dsp_chunk_write() - Format data to a DSP memory chunk * @ch: Pointer to the chunk structure * @nbits: Number of bits to write * @val: Value to write * * This function sequentially writes values into the format required for DSP * memory, it handles both inserting of the padding bytes and converting to * big endian. Note that data is only committed to the chunk when a whole DSP * words worth of data is available. * * Return: Zero for success, a negative number on error. */ int cs_dsp_chunk_write(struct cs_dsp_chunk *ch, int nbits, u32 val) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_chunk_flush() - Pad remaining data with zero and commit to chunk * @ch: Pointer to the chunk structure * * As cs_dsp_chunk_write only writes data when a whole DSP word is ready to * be written out it is possible that some data will remain in the cache, this * function will pad that data with zeros upto a whole DSP word and write out. * * Return: Zero for success, a negative number on error. */ int cs_dsp_chunk_flush(struct cs_dsp_chunk *ch) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_chunk_read() - Parse data from a DSP memory chunk * @ch: Pointer to the chunk structure * @nbits: Number of bits to read * * This function sequentially reads values from a DSP memory formatted buffer, * it handles both removing of the padding bytes and converting from big endian. * * Return: A negative number is returned on error, otherwise the read value. */ int cs_dsp_chunk_read(struct cs_dsp_chunk *ch, int nbits) { … } EXPORT_SYMBOL_NS_GPL(…); struct cs_dsp_wseq_op { … }; static void cs_dsp_wseq_clear(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq) { … } static int cs_dsp_populate_wseq(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq) { … } /** * cs_dsp_wseq_init() - Initialize write sequences contained within the loaded DSP firmware * @dsp: Pointer to DSP structure * @wseqs: List of write sequences to initialize * @num_wseqs: Number of write sequences to initialize * * Return: Zero for success, a negative number on error. */ int cs_dsp_wseq_init(struct cs_dsp *dsp, struct cs_dsp_wseq *wseqs, unsigned int num_wseqs) { … } EXPORT_SYMBOL_NS_GPL(…); static struct cs_dsp_wseq_op *cs_dsp_wseq_find_op(u32 addr, u8 op_code, struct list_head *wseq_ops) { … } /** * cs_dsp_wseq_write() - Add or update an entry in a write sequence * @dsp: Pointer to a DSP structure * @wseq: Write sequence to write to * @addr: Address of the register to be written to * @data: Data to be written * @op_code: The type of operation of the new entry * @update: If true, searches for the first entry in the write sequence with * the same address and op_code, and replaces it. If false, creates a new entry * at the tail * * This function formats register address and value pairs into the format * required for write sequence entries, and either updates or adds the * new entry into the write sequence. * * If update is set to true and no matching entry is found, it will add a new entry. * * Return: Zero for success, a negative number on error. */ int cs_dsp_wseq_write(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq, u32 addr, u32 data, u8 op_code, bool update) { … } EXPORT_SYMBOL_NS_GPL(…); /** * cs_dsp_wseq_multi_write() - Add or update multiple entries in a write sequence * @dsp: Pointer to a DSP structure * @wseq: Write sequence to write to * @reg_seq: List of address-data pairs * @num_regs: Number of address-data pairs * @op_code: The types of operations of the new entries * @update: If true, searches for the first entry in the write sequence with * the same address and op_code, and replaces it. If false, creates a new entry * at the tail * * This function calls cs_dsp_wseq_write() for multiple address-data pairs. * * Return: Zero for success, a negative number on error. */ int cs_dsp_wseq_multi_write(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq, const struct reg_sequence *reg_seq, int num_regs, u8 op_code, bool update) { … } EXPORT_SYMBOL_NS_GPL(…); MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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