// SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2021 Aspeed Technology Inc. */ #include <crypto/engine.h> #include <crypto/internal/akcipher.h> #include <crypto/internal/rsa.h> #include <crypto/scatterwalk.h> #include <linux/clk.h> #include <linux/count_zeros.h> #include <linux/dma-mapping.h> #include <linux/err.h> #include <linux/interrupt.h> #include <linux/kernel.h> #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/slab.h> #include <linux/string.h> #ifdef CONFIG_CRYPTO_DEV_ASPEED_DEBUG #define ACRY_DBG(d, fmt, ...) … #else #define ACRY_DBG … #endif /***************************** * * * ACRY register definitions * * * * ***************************/ #define ASPEED_ACRY_TRIGGER … #define ASPEED_ACRY_DMA_CMD … #define ASPEED_ACRY_DMA_SRC_BASE … #define ASPEED_ACRY_DMA_LEN … #define ASPEED_ACRY_RSA_KEY_LEN … #define ASPEED_ACRY_INT_MASK … #define ASPEED_ACRY_STATUS … /* rsa trigger */ #define ACRY_CMD_RSA_TRIGGER … #define ACRY_CMD_DMA_RSA_TRIGGER … /* rsa dma cmd */ #define ACRY_CMD_DMA_SRAM_MODE_RSA … #define ACRY_CMD_DMEM_AHB … #define ACRY_CMD_DMA_SRAM_AHB_ENGINE … /* rsa key len */ #define RSA_E_BITS_LEN(x) … #define RSA_M_BITS_LEN(x) … /* acry isr */ #define ACRY_RSA_ISR … #define ASPEED_ACRY_BUFF_SIZE … #define ASPEED_ACRY_SRAM_MAX_LEN … #define ASPEED_ACRY_RSA_MAX_KEY_LEN … #define CRYPTO_FLAGS_BUSY … #define BYTES_PER_DWORD … /***************************** * * * AHBC register definitions * * * * ***************************/ #define AHBC_REGION_PROT … #define REGION_ACRYM … #define ast_acry_write(acry, val, offset) … #define ast_acry_read(acry, offset) … struct aspeed_acry_dev; aspeed_acry_fn_t; struct aspeed_acry_dev { … }; struct aspeed_acry_ctx { … }; struct aspeed_acry_alg { … }; enum aspeed_rsa_key_mode { … }; static inline struct akcipher_request * akcipher_request_cast(struct crypto_async_request *req) { … } static int aspeed_acry_do_fallback(struct akcipher_request *req) { … } static bool aspeed_acry_need_fallback(struct akcipher_request *req) { … } static int aspeed_acry_handle_queue(struct aspeed_acry_dev *acry_dev, struct akcipher_request *req) { … } static int aspeed_acry_do_request(struct crypto_engine *engine, void *areq) { … } static int aspeed_acry_complete(struct aspeed_acry_dev *acry_dev, int err) { … } /* * Copy Data to DMA buffer for engine used. */ static void aspeed_acry_rsa_sg_copy_to_buffer(struct aspeed_acry_dev *acry_dev, u8 *buf, struct scatterlist *src, size_t nbytes) { … } /* * Copy Exp/Mod to DMA buffer for engine used. * * Params: * - mode 0 : Exponential * - mode 1 : Modulus * * Example: * - DRAM memory layout: * D[0], D[4], D[8], D[12] * - ACRY SRAM memory layout should reverse the order of source data: * D[12], D[8], D[4], D[0] */ static int aspeed_acry_rsa_ctx_copy(struct aspeed_acry_dev *acry_dev, void *buf, const void *xbuf, size_t nbytes, enum aspeed_rsa_key_mode mode) { … } static int aspeed_acry_rsa_transfer(struct aspeed_acry_dev *acry_dev) { … } static int aspeed_acry_rsa_trigger(struct aspeed_acry_dev *acry_dev) { … } static int aspeed_acry_rsa_enc(struct akcipher_request *req) { … } static int aspeed_acry_rsa_dec(struct akcipher_request *req) { … } static u8 *aspeed_rsa_key_copy(u8 *src, size_t len) { … } static int aspeed_rsa_set_n(struct aspeed_acry_ctx *ctx, u8 *value, size_t len) { … } static int aspeed_rsa_set_e(struct aspeed_acry_ctx *ctx, u8 *value, size_t len) { … } static int aspeed_rsa_set_d(struct aspeed_acry_ctx *ctx, u8 *value, size_t len) { … } static void aspeed_rsa_key_free(struct aspeed_acry_ctx *ctx) { … } static int aspeed_acry_rsa_setkey(struct crypto_akcipher *tfm, const void *key, unsigned int keylen, int priv) { … } static int aspeed_acry_rsa_set_pub_key(struct crypto_akcipher *tfm, const void *key, unsigned int keylen) { … } static int aspeed_acry_rsa_set_priv_key(struct crypto_akcipher *tfm, const void *key, unsigned int keylen) { … } static unsigned int aspeed_acry_rsa_max_size(struct crypto_akcipher *tfm) { … } static int aspeed_acry_rsa_init_tfm(struct crypto_akcipher *tfm) { … } static void aspeed_acry_rsa_exit_tfm(struct crypto_akcipher *tfm) { … } static struct aspeed_acry_alg aspeed_acry_akcipher_algs[] = …; static void aspeed_acry_register(struct aspeed_acry_dev *acry_dev) { … } static void aspeed_acry_unregister(struct aspeed_acry_dev *acry_dev) { … } /* ACRY interrupt service routine. */ static irqreturn_t aspeed_acry_irq(int irq, void *dev) { … } /* * ACRY SRAM has its own memory layout. * Set the DRAM to SRAM indexing for future used. */ static void aspeed_acry_sram_mapping(struct aspeed_acry_dev *acry_dev) { … } static void aspeed_acry_done_task(unsigned long data) { … } static const struct of_device_id aspeed_acry_of_matches[] = …; static int aspeed_acry_probe(struct platform_device *pdev) { … } static void aspeed_acry_remove(struct platform_device *pdev) { … } MODULE_DEVICE_TABLE(of, aspeed_acry_of_matches); static struct platform_driver aspeed_acry_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
Codebase Browser
linux