linux/drivers/crypto/marvell/octeontx2/cn10k_cpt.c

// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (C) 2021 Marvell. */

#include <linux/soc/marvell/octeontx2/asm.h>
#include "otx2_cptpf.h"
#include "otx2_cptvf.h"
#include "otx2_cptlf.h"
#include "cn10k_cpt.h"

static void cn10k_cpt_send_cmd(union otx2_cpt_inst_s *cptinst, u32 insts_num,
			       struct otx2_cptlf_info *lf);

static struct cpt_hw_ops otx2_hw_ops = …;

static struct cpt_hw_ops cn10k_hw_ops = …;

static void cn10k_cpt_send_cmd(union otx2_cpt_inst_s *cptinst, u32 insts_num,
			       struct otx2_cptlf_info *lf)
{ … }

int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf)
{ … }
EXPORT_SYMBOL_NS_GPL(…);

int cn10k_cptvf_lmtst_init(struct otx2_cptvf_dev *cptvf)
{ … }
EXPORT_SYMBOL_NS_GPL(…);

void cn10k_cpt_hw_ctx_clear(struct pci_dev *pdev,
			    struct cn10k_cpt_errata_ctx *er_ctx)
{ … }
EXPORT_SYMBOL_NS_GPL(…);

void cn10k_cpt_hw_ctx_set(union cn10k_cpt_hw_ctx *hctx, u16 ctx_sz)
{ … }
EXPORT_SYMBOL_NS_GPL(…);

int cn10k_cpt_hw_ctx_init(struct pci_dev *pdev,
			  struct cn10k_cpt_errata_ctx *er_ctx)
{ … }
EXPORT_SYMBOL_NS_GPL(…);

void cn10k_cpt_ctx_flush(struct pci_dev *pdev, u64 cptr, bool inval)
{ … }
EXPORT_SYMBOL_NS_GPL(…);

void cptvf_hw_ops_get(struct otx2_cptvf_dev *cptvf)
{ … }
EXPORT_SYMBOL_NS_GPL(…);