linux/Nonecommon.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
 */

#include <crypto/internal/hash.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/types.h>
#include <crypto/scatterwalk.h>
#include <crypto/sha1.h>
#include <crypto/sha2.h>

#include "cipher.h"
#include "common.h"
#include "core.h"
#include "regs-v5.h"
#include "sha.h"
#include "aead.h"

static inline u32 qce_read(struct qce_device *qce, u32 offset)
{ … }

static inline void qce_write(struct qce_device *qce, u32 offset, u32 val)
{ … }

static inline void qce_write_array(struct qce_device *qce, u32 offset,
				   const u32 *val, unsigned int len)
{ … }

static inline void
qce_clear_array(struct qce_device *qce, u32 offset, unsigned int len)
{ … }

static u32 qce_config_reg(struct qce_device *qce, int little)
{ … }

void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len)
{ … }

static void qce_setup_config(struct qce_device *qce)
{ … }

static inline void qce_crypto_go(struct qce_device *qce, bool result_dump)
{ … }

#if defined(CONFIG_CRYPTO_DEV_QCE_SHA) || defined(CONFIG_CRYPTO_DEV_QCE_AEAD)
static u32 qce_auth_cfg(unsigned long flags, u32 key_size, u32 auth_size)
{ … }
#endif

#ifdef CONFIG_CRYPTO_DEV_QCE_SHA
static int qce_setup_regs_ahash(struct crypto_async_request *async_req)
{ … }
#endif

#if defined(CONFIG_CRYPTO_DEV_QCE_SKCIPHER) || defined(CONFIG_CRYPTO_DEV_QCE_AEAD)
static u32 qce_encr_cfg(unsigned long flags, u32 aes_key_size)
{ … }
#endif

#ifdef CONFIG_CRYPTO_DEV_QCE_SKCIPHER
static void qce_xts_swapiv(__be32 *dst, const u8 *src, unsigned int ivsize)
{ … }

static void qce_xtskey(struct qce_device *qce, const u8 *enckey,
		       unsigned int enckeylen, unsigned int cryptlen)
{ … }

static int qce_setup_regs_skcipher(struct crypto_async_request *async_req)
{ … }
#endif

#ifdef CONFIG_CRYPTO_DEV_QCE_AEAD
static const u32 std_iv_sha1[SHA256_DIGEST_SIZE / sizeof(u32)] = …;

static const u32 std_iv_sha256[SHA256_DIGEST_SIZE / sizeof(u32)] = …;

static unsigned int qce_be32_to_cpu_array(u32 *dst, const u8 *src, unsigned int len)
{ … }

static int qce_setup_regs_aead(struct crypto_async_request *async_req)
{ … }
#endif

int qce_start(struct crypto_async_request *async_req, u32 type)
{ … }

#define STATUS_ERRORS …

int qce_check_status(struct qce_device *qce, u32 *status)
{ … }

void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step)
{ … }