/* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (c) 2022 HiSilicon Limited. */ #ifndef QM_COMMON_H #define QM_COMMON_H #define QM_DBG_READ_LEN … struct qm_cqe { … }; struct qm_eqe { … }; struct qm_aeqe { … }; struct qm_sqc { … }; struct qm_cqc { … }; struct qm_eqc { … }; struct qm_aeqc { … }; int qm_set_and_get_xqc(struct hisi_qm *qm, u8 cmd, void *xqc, u32 qp_id, bool op); void hisi_qm_show_last_dfx_regs(struct hisi_qm *qm); void hisi_qm_set_algqos_init(struct hisi_qm *qm); #endif