#ifndef _ISHTP_HW_ISH_H_
#define _ISHTP_HW_ISH_H_
#include <linux/pci.h>
#include <linux/interrupt.h>
#include "hw-ish-regs.h"
#include "ishtp-dev.h"
#define PCI_DEVICE_ID_INTEL_ISH_CHV …
#define PCI_DEVICE_ID_INTEL_ISH_BXT_Ax …
#define PCI_DEVICE_ID_INTEL_ISH_BXT_Bx …
#define PCI_DEVICE_ID_INTEL_ISH_APL_Ax …
#define PCI_DEVICE_ID_INTEL_ISH_SPT_Ax …
#define PCI_DEVICE_ID_INTEL_ISH_CNL_Ax …
#define PCI_DEVICE_ID_INTEL_ISH_GLK_Ax …
#define PCI_DEVICE_ID_INTEL_ISH_CNL_H …
#define PCI_DEVICE_ID_INTEL_ISH_ICL_MOBILE …
#define PCI_DEVICE_ID_INTEL_ISH_SPT_H …
#define PCI_DEVICE_ID_INTEL_ISH_CML_LP …
#define PCI_DEVICE_ID_INTEL_ISH_CMP_H …
#define PCI_DEVICE_ID_INTEL_ISH_EHL_Ax …
#define PCI_DEVICE_ID_INTEL_ISH_TGL_LP …
#define PCI_DEVICE_ID_INTEL_ISH_TGL_H …
#define PCI_DEVICE_ID_INTEL_ISH_ADL_S …
#define PCI_DEVICE_ID_INTEL_ISH_ADL_P …
#define PCI_DEVICE_ID_INTEL_ISH_ADL_N …
#define PCI_DEVICE_ID_INTEL_ISH_RPL_S …
#define PCI_DEVICE_ID_INTEL_ISH_MTL_P …
#define PCI_DEVICE_ID_INTEL_ISH_ARL_H …
#define PCI_DEVICE_ID_INTEL_ISH_ARL_S …
#define PCI_DEVICE_ID_INTEL_ISH_LNL_M …
#define REVISION_ID_CHT_A0 …
#define REVISION_ID_CHT_Ax_SI …
#define REVISION_ID_CHT_Bx_SI …
#define REVISION_ID_CHT_Kx_SI …
#define REVISION_ID_CHT_Dx_SI …
#define REVISION_ID_CHT_B0 …
#define REVISION_ID_SI_MASK …
struct ipc_rst_payload_type { … };
struct time_sync_format { … } __packed;
struct ipc_time_update_msg { … } __packed;
enum { … };
struct ish_hw { … };
enum { … };
#define to_ish_hw(dev) …
irqreturn_t ish_irq_handler(int irq, void *dev_id);
struct ishtp_device *ish_dev_init(struct pci_dev *pdev);
int ish_hw_start(struct ishtp_device *dev);
void ish_device_disable(struct ishtp_device *dev);
int ish_disable_dma(struct ishtp_device *dev);
void ish_set_host_ready(struct ishtp_device *dev);
#endif